Nvidia

Nvidia

Senior Silicon Product Engineer – Manufacturing

US, CA, Santa Clara · Senior

Sponsorship not specifiedDetected 5 days ago
PythonBashLinuxData AnalysisStatisticsProblem Solving

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Cap-exempt (no lottery)0
Sponsors this role100
Entry-level history0
PERM / green-card track0
Lottery odds40
Fits your clock70

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Green-card filing pattern in this occupation

Context, not a finding about this posting: of this employer's 296 green-card filings in this occupation, 98% were for a worker who already held the job.

Green-card follow-through: 95%

Of 584 labor certifications old enough to have been used, 29 expired without the employer filing the next step. Median time from filing to decision: 497 days.97% of their filings were for a worker who already held the job.Only certifications past the 180-day window are counted — recent ones cannot have expired yet.

Files H-1B transfers

620 transfer filings in the last year, covering 1241 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.

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About the role

  • Our team gets every GPU, SoC, and CPU silicon program from first power-on to high-volume production!
  • Prototype and fine-tune speed, power, circuits, yield, and quality for effective silicon coverage in the SLT socketed environment.
  • Define procedures to facilitate Silicon correlation activities between production testing infrastructure and internal Si characterization and diagnostics programs.

Responsibilities

  • This role sits at the intersection of multi-functional HW/SW teams and Production Operations to make manufacturing an outstanding part of the overall Silicon co-design cycle, production release, and HVM testing!
  • The exceptional hire continuously improves high-volume manufacturing workflows and products multi-functionally and uses AI deliberately to drive impact while managing risk.
  • Partner with SW and platform teams to support and improve SLT testing infrastructure, debug knobs, and data collection features needed to support manufacturing screens effectively.
  • Co-design, develop, and maintain SLT testing flows and incorporate takeaways from silicon and correlate to design.
  • Initiate and drive process improvements and preventative actions through root cause analysis and data analytics.
  • Strong EE fundamentals, device physics, knowledgeable in Silicon design, statistics, STA concepts, signal integrity, fault analysis, sampling, and computer architecture.
  • Excellent interpersonal skills and demonstrated ability to drive multi-functional alignment around plans, dependencies, and sign-off criteria.

Requirements

  • Hands-on lab experience with system-level post-silicon bring-up and silicon debugging is required.
  • Bachelor's or Master's Degree or equivalent in Microelectronics/Electrical/Electronic/Computer Engineering or equivalent experience.
  • Experience with Python, BASH, Linux, and scripting.

Benefits

  • Co-design SLT testability scope and coverage enhancements for Nvidia's manufacturing testing with a focus on high-volume system-level manufacturing screens.
  • Support customer-facing and quality teams during customer escalations to understand the issues and fix gaps identified in SLT production coverage.
  • Drive alignment for manufacturability, test time optimization and reduction, cost vs. coverage tradeoffs, etc., to evaluate the effectiveness of new tests.
  • Hands-on lab experience with silicon bring-up, lab debug, test content bring-up, and correlation to Si characterization, yield, and coverage optimization.

Company info

  • We are hiring a Senior Silicon Product Engineer - Manufacturing to join our Testability, Manufacturability, Reliability & Quality (TMRQ) team.

This listing is sourced directly from Nvidia's careers page and normalized into a canonical job model.