Arista Networks

Arista Networks

Senior Signal Integrity / Power Integrity (SI/PI) Engineer

Roseville, CA, United States · Senior

Sponsorship not specified$260k-$470kDetected 15 days ago
NLPANSYSPCB DesignCadenceEMI/EMCElectrical EngineeringHardware DesignResearchCommunicationCollaboration

About the role

  • What sets us apart is our relentless pursuit of innovation.
  • We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world.
  • We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation.

Responsibilities

  • Perform 3D EM design and simulation of high-speed interconnects (channels, vias, packages, and connectors) for 112G/224G PAM4 SerDes using tools such as Ansys HFSS, SiWave, and Cadence Sigrity.
  • Develop and validate test vehicles to characterize next-generation PCB materials, packages, and interconnects.
  • Conduct S-parameter and time-domain measurements (VNA, TDR, BERT) to extract channel performance and validate modeling correlation.
  • Perform link-level analysis for advanced standards (Ethernet 800G/1.6T, PCIe Gen6/Gen7, CXL) using tools such as Keysight ADS or Cadence SystemSI.
  • Collaborate closely with hardware, mechanical, and packaging teams to optimize stack- up, breakout, and routing strategies for high-density designs.
  • Support bring-up and debug of production boards, working cross-functionally to root-cause SI/PI issues.
  • BS/MS/PhD in Electrical Engineering, Physics, or related field with a focus on electromagnetics, signal integrity, or high-speed digital design.
  • Familiarity with advanced PCB materials (e.g., Megtron 7, Tachyon 100G, SLP) and manufacturing constraints for high-speed design.
  • Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges.
  • At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do.

Requirements

  • Hands-on experience with 2.5D/3D EM solvers (Ansys HFSS, SiWave, Sigrity, CST).

Nice to have

  • Experience with co-packaged optics, chiplet-based architectures, or advanced substrate technologies.
  • Familiarity with EMI/EMC considerations and signal/power isolation in densely integrated photonic-electronic systems.
  • Understanding of thermal and mechanical effects on SI/PI performance and long-term reliability.
  • Experience working with fabrication vendors, ASIC teams, and contract manufacturers to ensure end-to-end channel integrity.
  • Knowledge of power integrity and co-simulation techniques is a plus.

Compensation

  • The new hire base pay for this role has a pay range of $162,000 to $225,000.
  • Arista offers different pay ranges based on work location, so that we can offer consistent and competitive pay appropriate to the market.
  • The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location.
  • The salary range provided reflects base pay only.

Company info

  • At Arista we value the diversity of thought and perspectives that each employee brings to the table.
  • We are growing in Roseville!

Equal opportunity

  • Arista Networks is an equal opportunity employer.
  • All your information will be kept confidential according to EEO guidelines.

This listing is sourced directly from Arista Networks's careers page and normalized into a canonical job model.