Nuvacore
Compiler and ToolChain Engineer
United States · Senior
Stay score
odds of building a lasting career here
Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.
Lottery odds assume a STEM candidate.
Personalize to your clock →Employer immigration record
from this employer's Department of Labor filings
Files H-1B transfers
Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.
Community outcomes
No reports yet — be the first to help the next applicant.
About the role
- You'll work close to the metal - implementing machine models for our microarchitecture, chasing down codegen correctness and performance issues, and partnering directly with CPU architects to extract every bit of performance possible.
- Diagnose and resolve codegen correctness bugs and performance regressions across the toolchain, from source down to generated machine code
- Performance optimization of system libraries and dynamic language environments
Responsibilities
- Nuvacore is building a ground-up, high performance, low power CPU silicon for next-generation compute workloads.
- You will work closely with our performance engineers to develop an understanding of key performance issues in real-world applications and strategies for optimizing software, libraries and the microarchitecture.
- Design, implement, and maintain compiler backend support (instruction selection, scheduling, register allocation, code generation) for Nuvacore's ISA across GCC and/or LLVM
- Drive toolchain architecture decisions that span the software/hardware boundary and set technical direction for the compiler team
- Prior experience at a CPU or silicon design company
- Architecture and firmware teams treat you as a trusted technical partner on compiler-related design tradeoffs
Requirements
- 15+ years of professional experience working on compiler internals - frontend, middle-end, or backend - in LLVM and/or GCC
- Strong understanding of compiler backend construction:
- Proven experience debugging functional and performance issues in large, complex software systems
- Experience working within modern, automated software development methodologies (CI/CD, automated testing, code review tooling)
- Experience with performance analysis of large scale system-level applications including JIT environments and multiple languages
- Experience with simulators or instruction set simulators (QEMU, ISS) for toolchain bring-up and validation
- Experience bringing up a toolchain for new silicon, from pre-tapeout simulation through post-silicon validation
Skills
- Strong written and verbal communication skills
Compensation
- $140k-$250k
Company info
- Our software organization works at the intersection of CPU architecture, silicon design, firmware, operating systems, toolchains, and platform software - developing the compiler toolchains, OS enablement, firmware, and validation infrastructure that ensure new processor capabilities are fully realized in software.
This listing is sourced directly from Nuvacore's careers page and normalized into a canonical job model.