Axiado
Senior IC Packaging Engineer
San Jose, CA, United States · Senior
Sponsorship not specifiedDetected 70 days ago
Node.jsCybersecurityProduct ManagementProduct StrategyANSYSCadenceElectrical EngineeringVoIPResearchLeadershipCollaboration
About the role
- Our technology protects the world's most critical infrastructure-from data centers to next generation cloud and AI platforms-by securing systems at the foundation levels of hardware, independent of host CPUs and operating systems.
- We value curiosity, execution, respect, and a shared desire to make a meaningful impact on the security and reliability of the digital world.
- If you're driven to innovate, energized by hard problems, and excited to help define the future of secure AI infrastructure, we invite you to apply and join us on this journey.
Responsibilities
- Own package architecture and technology roadmap, aligned with product, cost, and scalability goals.
- Lead chiplet-based packaging strategies, including UCIe, silicon interposers, and advanced RDL.
- Perform and guide hands-on package design and physical layout, including critical structures for High-speed SerDes/PHY (PCIe, CXL), LPDDR5, UCIe, and Other multi-gigabit interfaces.
- Drive SI/PI, thermal, mechanical, and reliability trade-offs at the system and package levels.
- Lead external engagement with OSATs, foundries, and key suppliers for technology development and manufacturing readiness.
- Establish scalable design methodologies, best practices, and reusable packaging flows.
Requirements
- Experience defining die-to-die and chiplet based RDL/bump architecture.
Nice to have
- Serve as technical authority for IC and SiP packaging across multiple products and programs.
- Define substrate stack-ups, materials, bump/RDL architectures, and DFM guidelines for advanced nodes.
- Influence product roadmap, risk management, and investment decisions through technical insight.
- BSEE or MSEE (PhD a plus) in Electrical Engineering, or related field.
- Minimum of 10+ years of experience with extensive IC packaging expertise for SoCs, ASICs, or memory products.
- Deep hands-on expertise in Flip-Chip BGA (FCBGA) and System-in-Package (SiP), RDL, silicon interposers, and chiplet architectures (UCIe)
- Strong understanding of electrical, mechanical, thermal, and reliability design trade-offs, Advanced packaging materials and substrate technologies, Design-for-Manufacturing (DFM) and yield optimization
- Demonstrated ability to operate autonomously, make high-impact decisions, and execute in a startup environment.
Skills
- Company Description
Benefits
- Working hard and smart, continuous learning and mutual support are all part of who we are.
Company info
- We are headquartered in the heart of Silicon Valley, with access to the world's leading research, technology and talent.
- We are building an exceptional team to secure every node on the internet.
Equal opportunity
- Axiado is an Equal Opportunity Employer.
This listing is sourced directly from Axiado's careers page and normalized into a canonical job model.