Astera Labs Inc.
Senior Principal System Validation Engineer
San Jose, California, United States · Principal
Sponsorship not specifiedDetected 5 days ago
PythonC++LinuxMachine LearningData AnalysisPCB DesignAltiumCadence
About the role
- Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
- Think and act with the customer in mind!
- The base salary range is $205,000.00 USD - $255,000.00 USD.
Requirements
- Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for customer/internal meetings in advance, and to work with minimal guidance and supervision.
- Required experience
- Hands-on, thorough knowledge of high-speed protocols like CXL, PCIe, NVMe, or Ethernet.
- Experience with Silicon/System bring-up, validation, and debug experience, including in customer systems.
- Experience with lab equipment including protocol analyzers, in-circuit debuggers, and CPU-based tool suites.
- Working knowledge of C or C++ for embedded FW and device drivers.
- Familiarity with PCIe compliance standards and ability to follow and be involved in compliance consortiums to adapt the tests to be run from X86/ARM based platforms.
- Knowledge of schematic capture and PCB layout tools from Cadence Allegro, Altium, etc.
- Knowledge of simulation tools such as Keysight ADS, Mathworks QCD, etc. for IBIS-AMI analysis.
Nice to have
- Strong academic and technical background in Electrical or Computer Engineering.
- At a minimum, a Bachelor's is required, and a Master's is preferred.
- Preferred experience
- Working knowledge of SerDes architecture including Tx/Rx equalization, adaptation, CDR, block level requirements and SerDes link jitter budget.
Skills
- ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
- Discover more at www.asteralabs.com.
Compensation
- The base salary range is $205,000.00 USD - $255,000.00 USD.
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