Tenstorrent Inc.

Physical Design Engineer: Die-to-Die Interface (RTL to GDSII)

United States · Contract

Sponsorship not specified$100k-$500kDetected 8 days ago

PythonCadenceCollaboration

About the role

With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors.
We value collaboration, curiosity, and a commitment to solving hard problems.
This role is remote role open to any location in the U.S. We welcome candidates at various experience levels for this role.

Drive timing and verification, including full STA (setup/hold), SI analysis (crosstalk, IR drop), and achieving sign-off quality DRC/LVS.
Improve and maintain physical design methodologies, flows, and automation scripts (Tcl, Python), with specific focus on D2D routing, power grid design, and timing closure.
Partner closely with full-chip/chiplet teams to meet all tapeout requirements and with the analog design team to resolve interface issues (LEF/LIB, constraints, integration/debug).

Apply strong EDA tool expertise across Synopsys/Cadence/Mentor for implementation, analysis, and verification.

for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets.

Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

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This listing is sourced directly from Tenstorrent Inc.'s careers page and normalized into a canonical job model.