Nuvacore

Nuvacore

Hardware Engineer

Santa Clara, CA · Senior

Sponsorship not specified$140k-$250kDetected 8 days ago
ANSYSThermal AnalysisPCB DesignAltiumCadenceMechanical DesignElectrical EngineeringHardware DesignCommunicationCollaboration

Stay score

odds of building a lasting career here

59Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role80
Entry-level history0
PERM / green-card track0
Lottery odds (Level IV)94
Fits your clock70

Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.

Lottery odds assume a STEM candidate.

Personalize to your clock →

H-1B wage level

the lottery is wage-weighted — each level is one more entry

Level I · 1×
Level I$152,1731 entry
Level II$180,2942 entries
Level III$208,4373 entries
Level IV$236,5584 entries

The bottom of this range ($140,000) is below the Level I prevailing wage of $152,173. An H-1B cannot be filed below the prevailing wage, so an offer at the floor of this band could not be sponsored as posted.

Based on the DOL prevailing wage for this occupation and worksite, a base salary of $180,294 would place this position at wage Level II. That figure is within the posted range, and I'd like to target it. This role classifies under "Computer Hardware Engineers" for prevailing-wage purposes.

DOL prevailing wage, 2026-27 wage year · Computer Hardware Engineers (17-2061) · San Jose-Sunnyvale-Santa Clara, CA. Wage level is derived by USCIS from the offered wage, occupation and worksite; the occupation shown is inferred from the job title.

Employer immigration record

from this employer's Department of Labor filings

Files H-1B transfers

8 transfer filings in the last year, covering 8 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.

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About the role

  • In this role, you will be responsible for the end-to-end hardware development life cycle, from initial concept and feasibility studies to schematic capture, PCB layout oversight, component selection, and laboratory brings-up.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • 10+ years deep understanding of data center server architectures, OCP (Open Compute Project) standards, and system topologies (e.g., CPU sockets, high-speed riser configurations, and BMC sub-systems).
  • Familiarity with the interplay between advanced semiconductor packaging (e.g., chiplets, 2.5D bridges) and high-density PCB implementation.
  • Excellent communication and cross-functional collaboration skills, with the ability to thrive in a fast-paced, startup-like environment.

Nice to have

  • High proficiency in industry-standard schematic capture and PCB layout tools (e.g., Cadence Allegro, Concept HDL, OrCAD, or Altium Designer).
  • Direct experience designing with high-speed serial/parallel interfaces (such as PCIe, DDR/LPDDR, or USB) and understanding basic SI/PI constraints.
  • Proven experience with board-level power distribution design, DC-DC converters, and multi-phase VRMs supporting high-current rails.

Skills

  • Strong hands-on laboratory experience with hardware debugging, rework, and using diagnostic equipment (DMMs, scopes, network analyzers).
  • Education: Master's degree in Electrical Engineering or Computer Engineering.
  • Master's degree in Electrical Engineering or Computer Engineering.

Compensation

  • $140k-$250k

This listing is sourced directly from Nuvacore's careers page and normalized into a canonical job model.