Etched

Etched

ASIC Technical Program Manager

San Jose · Vp

Sponsorship not specifiedDetected 82 days ago
NLPStakeholder ManagementVendor ManagementResearchLeadershipCommunication

About the role

  • Etched is seeking a highly skilled and motivated ASIC Technical Program Manager to join our silicon team.
  • The ideal candidate has real tape-out experience, understands the full RTL-to-GDSII flow, and operates with the urgency and proactivity that a first-silicon program demands.

Responsibilities

  • Cross-Functional Technical Coordination: Own program management across Physical Design, DFT, DV, RTL, and Post-Silicon teams.
  • Understand inter-team dependencies - know who owns what, when handoffs need to happen, and what needs to be signed off before downstream work can begin (e.g., RTL version gates for synthesis, DFT insertion checkpoints, ECO cycles).
  • Vendor Management: Engage directly with external vendors, including EDA partners and implementation partners. Hold vendors accountable to timelines and deliverables. Be prepared to push back, defend Etched's technical requirements, and escalate when needed.
  • Risk Identification and Mitigation: Proactively surface critical path risks, schedule slippage, and cross-team blockers. Develop mitigation strategies in partnership with engineering leads and escalate appropriately to technical and executive stakeholders.
  • Project Planning and Execution: Manage the scheduling and execution of complex, multi-team hardware programs. Keep projects on track across tape-out milestones, synthesis respins, and signoff cycles.
  • Process Coordination: Work with ops and engineering teams to maintain accurate tracking of program state, action owners, and open items.
  • Support the adoption of tooling and dashboards that improve engineering visibility - though dashboard creation itself sits with the ops team.
  • Technical Acumen: Bring enough ASIC domain knowledge to communicate credibly with engineers across the design stack and with external partners.
  • Solid understanding of the RTL-to-GDSII flow, including where Physical Design, DFT, DV, and RTL teams intersect and hand off to each other.
  • Experience working directly with external EDA vendors or implementation partners - you've been in those rooms and know how to hold your ground.

Requirements

  • Provide regular, clear updates to engineering leads, VP-level stakeholders, and executive leadership on project status, risks, and decisions required.
  • 5+ years of experience in technical program management, engineering program management, or a closely related role within the semiconductor or hardware space.
  • Comfort with fast-paced, ambiguous startup environments where priorities shift and programs evolve quickly.
  • Bachelor's degree in Engineering, Computer Science, or a related field.
  • Stakeholder Communication: Provide regular, clear updates to engineering leads, VP-level stakeholders, and executive leadership on project status, risks, and decisions required.
  • You may be a good fit if you have (Must-have qualifications)

Benefits

  • Medical, dental, and vision packages with generous premium coverage
  • $500 per month credit for waiving medical benefits
  • Various wellness benefits covering fitness, mental health, and more

Company info

  • We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes.
  • We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills.

This listing is sourced directly from Etched's careers page and normalized into a canonical job model.