D Matrix

Senior Staff PCB Layout Design Engineer

Santa Clara · Staff+

Sponsorship not specifiedDetected 90 days ago

PythonLLMsPCB DesignCadenceHardware DesignLeadership

About the role

At d-Matrix, our "Corsair" platforms push the boundaries of signal density and power delivery.

Full-Cycle System Layout: Lead the layout for high-complexity AI accelerator cards (PCIe form factors) and massive system baseboards.
Constraint Management & Process: Architect and manage the Constraint Manager (CM) hierarchy within Cadence Allegro.
Tooling & Automation: Drive productivity by developing or implementing automation scripts (SKILL, Python, or TCL) to streamline repetitive layout tasks, DRC checks, and report generation.
Power Delivery Optimization: Work with Power Engineers to implement complex PDN strategies, including multi-phase VRM layouts and optimized decoupling capacitor placement for high-TDP ASICs.

Mastery of Constraints: Expert-level proficiency in Cadence Allegro Constraint Manager, including the setup of complex T-junctions, differential pair phase-tuning, and Z-axis delay matching.
you are a hardware systems architect.
12+ years of experience in high-speed, high-density PCB layout for servers, networking, or AI accelerators.
Expert-level proficiency in Cadence Allegro Constraint Manager, including the setup of complex T-junctions, differential pair phase-tuning, and Z-axis delay matching.

Deep understanding of high-speed routing (back-drilling, via-in-pad, and skip-vias).

Technical Depth: * Deep understanding of high-speed routing (back-drilling, via-in-pad, and skip-vias).
o Experience with HDI (High-Density Interconnect) and ELIC (Every Layer Interconnect).
o Proven track record of successfully routing 112G SerDes and complex DDR5/HBM interfaces.
Preferred Skills
Experience establishing a Library Management System and standardized footprint/padstack creation processes.
Familiarity with PLM/PDM integration for managing layout releases and ECO (Engineering Change Order) workflows.
Knowledge of PCB warpage mitigation strategies for large-form-factor ASICs and MCMs.
The d-Matrix Advantage
Equal Opportunity Employment Policy
d-Matrix is proud to be an equal opportunity workplace and affirmative action employer.

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology.
We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible.
Our culture is one of respect and collaboration.
We are seeking individuals passionate about tackling challenges and are driven by execution.

Employment Policy
d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We're committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day.
d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.
We're committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work.

This listing is sourced directly from D Matrix's careers page and normalized into a canonical job model.