Nuvacore
CPU Performance Modeling (Lead & ICs)
United States · Principal
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About the role
- frontend (fetch, decode, branch prediction), out-of-order engine (rename, dispatch, execution), and memory subsystem (caches, prefetchers, TLBs, coherence).
- Mentor engineers across the performance team; provide technical leadership on modeling methodology, simulation infrastructure, and analysis tooling.
- Contribute to IP development through patents and, where applicable, external publication
Responsibilities
- Nuvacore is building a ground-up CPU silicon for next-generation compute workloads.
- As our CPU Performance Modeling Lead, you will own the performance modeling infrastructure and methodology that drives every architectural decision we make - from early pathfinding through tape-out and post-silicon correlation.
- Design, develop and own Nuvacore's cycle-accurate CPU performance simulator - its architecture, fidelity, and long-term roadmap - as the authoritative reference model for the design team.
- Drive model-to-RTL correlation through all execution phases; own debug and resolution of performance miscorrelation between the performance model, RTL simulation, and post-silicon results.
- Collaborate closely with design, verification, compiler, and system software teams to align architecture decisions with implementation constraints and software stack realities.
- Prior principal-level role at a CPU design organization.
Requirements
- 20+ years (Lead) or 8+ years (ICs) of hands-on experience with cycle-accurate C++ CPU performance simulators (e.g. gem5 or equivalent in-house tools).
- ability to write and analyze assembly for microarchitectural test cases.
- Experience with compiler optimizations and hardware/software co-design.
Nice to have
- MS in Computer Architecture, Computer Engineering, or related field (PhD preferred).
Compensation
- $200k-$300k
This listing is sourced directly from Nuvacore's careers page and normalized into a canonical job model.