Normal Computing

Normal Computing

Hardware Engineer, Architect

New York City

Sponsorship not specified$10k-$100kDetected 5 days ago
PythonC++Full-Stack DevelopmentAccessibilityFPGAVerilogElectrical EngineeringResearchLeadership

About the role

  • Most accelerator architecture is refinement: a known base compute architecture, a known programming model, and decades of prior art to lean on.
  • Normal's silicon computes with stochastic analog dynamics in memory, and the architecture that exploits it fully is being discovered alongside the development.
  • This is a seat for someone who wants to define structures that no prior art covers, and who has the architecture-to-silicon range to defend them all the way to tapeout.

Responsibilities

  • PE array design, datapath organization, and support for efficiency techniques such as sparsity exploitation and reduced-precision computation.
  • Identify where architectural innovation creates the most leverage, define the structures that realize it, and produce microarchitecture documents unambiguous enough for RTL engineers to implement against.
  • Move between algorithm-level workload behavior, memory hierarchy, on-chip interconnect, and physical design constraints.
  • Partner with the compiler lead on ISA co-design.

Requirements

  • A degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent work experience.
  • PhD welcome but not required
  • Substantial experience in architecture or microarchitecture of high-performance digital systems: AI accelerators, compute engines, or similarly complex logic.
  • You have shaped and directed the structures inside a chip, not just consumed them from the outside.
  • You can read a profile of a workload and translate it into datapath widths, pipeline stages, and area/power estimates without losing the thread on either side.
  • Experience with simulation-driven architecture.
  • Familiarity with quantization and reduced-precision approaches for inference and their implementation implications.
  • Experience writing microarchitecture specifications and working closely with RTL engineers through implementation.
  • Proficiency in Python or C++ for performance modeling and analysis, and familiarity with SystemVerilog or equivalent RTL.
  • Comfort operating in an environment where the architecture is actively being discovered alongside the work.

Compensation

  • $10k-$100k

Equal opportunity

  • Normal Computing is an Equal Opportunity Employer.
  • We celebrate diversity and are committed to creating an inclusive environment for all employees.
  • All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
  • Accessibility Accommodations

This listing is sourced directly from Normal Computing's careers page and normalized into a canonical job model.