Etched
Power Validation Engineer
San Jose · Staff+
Sponsorship not specifiedDetected 83 days ago
PythonRailsLinuxNLPLLMsStatisticsPCB DesignElectrical EngineeringPower ElectronicsTest AutomationAR/VRResearch
About the role
- We are looking for a Power Validation Engineer to own the end-to-end power characterization of our ASIC and the mezzanine card platform - from early silicon bring-up through production qualification.
- You will design measurement methodology, build test benches, and drive findings directly into silicon, package, and system design decisions.
Responsibilities
- Design and execute power measurement campaigns across all voltage rails (VDD_CORE, HBM, PCIe, AUX, etc) under realistic LLM inference and power virus workloads
- Validate power delivery network (PDN) performance - VRM load step response, PCIe power compliance, PDN impedance - and translate measurements into actionable feedback on capacitor placement, plane geometry, and de-cap strategy for PCB and package design teams
- build automated power sweep frameworks exercising the full inference workload space across model sizes, batch sizes, sequence lengths, and precision modes
- instrument multi-zone thermal profiles and support our overseas partners with SLT, production and debugging.
- Validate power sequencing, PMBus telemetry accuracy, and BMC alert thresholds across cold-start, hot-restart, and fault-injection scenarios
- own power-related pass/fail criteria across FAT, SFT, and RIN qualification stages
- Lead the electrical characterization, validation, and qualification process for the on-board system-level power distribution network, spanning from power converter design to ASIC power integrity validation.
- Provide critical support to design engineers through debug, component validation, and failure analysis for released products, independently troubleshooting and determining the root cause of electrical component defects and design flaws.
- Relocation support for those moving to San Jose (Santana Row)
Requirements
- Strong candidates may also have experience with (Nice-to-have qualifications)
Nice to have
- characterize peak, sustained, and idle power envelopes across PVT corners and define derating curves used in system thermal and PDN specs
- Profile power transient events (ramp rates, droop amplitudes, recovery profiles) and correlate them with on-die performance monitor data
- Run extended stress workloads (72 h+ continuous) to surface reliability risks and throttling behavior
- write precise validation reports that enable silicon and firmware teams to act without re-running experiments
- A Bachelor's degree in Electrical Engineering or a related field.
- Advanced degrees or certifications in power electronics or related areas are a plus
- Expertise with multi-phase solutions with high dynamic content and low tolerance.
- Experience with VR tuning to a well defined power test plan to ensure VR specifications meet CPU/ ASIC
Benefits
- Medical, dental, and vision packages with generous premium coverage
- $500 per month credit for waiving medical benefits
- Various wellness benefits covering fitness, mental health, and more
Company info
- Develop and implement automated/scripted test procedures for the general qualification and testing of Devices Under Test (DUTs) as part of a comprehensive automation suite.
- We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes.
- We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills.
This listing is sourced directly from Etched's careers page and normalized into a canonical job model.