Astera Labs Inc.

Astera Labs Inc.

Technical Lead Package Platform Engineer

San Jose, California, United States · Senior

Sponsorship not specified$160k-$200kDetected 10 days ago
Platform EngineeringProject ManagementCadenceLeadershipCollaborationProblem Solving

Stay score

odds of building a lasting career here

64Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role100
Entry-level history0
PERM / green-card track0
Lottery odds (Level IV)94
Fits your clock70

Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.

Lottery odds assume a STEM candidate.

Personalize to your clock →

H-1B wage level

the lottery is wage-weighted — each level is one more entry

Level I · 1×
Level I$152,7971 entry
Level II$187,0752 entries
Level III$221,3743 entries
Level IV$255,6534 entries

$27,075 more$187,075 — moves this role to Level II and 2 lottery entries. That figure is inside the range the employer already advertised.

Based on the DOL prevailing wage for this occupation and worksite, a base salary of $187,075 would place this position at wage Level II. That figure is within the posted range, and I'd like to target it. This role classifies under "Software Developers" for prevailing-wage purposes.

DOL prevailing wage, 2026-27 wage year · Software Developers (15-1252) · San Jose-Sunnyvale-Santa Clara, CA. Wage level is derived by USCIS from the offered wage, occupation and worksite; the occupation shown is inferred from the job title.

Employer immigration record

from this employer's Department of Labor filings

Files H-1B transfers

28 transfer filings in the last year, covering 28 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.

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About the role

  • We are seeking a L ead Package Engineer to drive the development, qualification, and manufacturing of advanced FCBGA packages.
  • This role will drive package development from concept through NPI, qualification, and high-volume manufacturing, with strong ownership of technical execution, supplier management, project management, and package-related customer quality issues.

Responsibilities

  • Lead FCBGA package NPI development from concept and die netlist through package design, assembly development, qualification, and production release.
  • Manage technical execution with substrate suppliers and assembly OSAT partners, including schedule, quality, manufacturing readiness, yield improvement, and issue resolution.
  • Lead technical project management activities, including project planning, milestone tracking, risk assessment and mitigation, issue escalation, and cross-functional execution.
  • Collaborate with Package Design, Product Engineering, Program Management, Quality, Marketing, and other internal teams to ensure successful product development and launch.
  • Lead package reliability assessment and qualification planning for FCBGA products, including large-body packages.
  • Support system-level reliability assessment and risk mitigation for large-size FCBGA packages.
  • Lead investigation and resolution of customer returns and field quality issues related to package assembly processes, materials, and workmanship quality.
  • Drive root cause analysis, failure analysis, containment, corrective actions, and recurrence prevention in collaboration with internal teams, material suppliers, substrate suppliers, and OSAT partners.
  • Support package and substrate warpage characterization, analysis, and improvement, including the impact of materials, package architecture, and assembly processes.
  • The successful candidate will work closely with package design, Product Engineering, Program Management, Quality, Marketing, substrate suppliers, and assembly OSAT partners to deliver robust, manufacturable, and reliable package solutions.

Requirements

  • Bachelor's degree or higher in a related field
  • Minimum of 5 years of professional experience in electronic packaging fields.
  • Strong experience in FCBGA assembly manufacturing processes and laminate substrate technologies.
  • Proven NPI development experience for advanced flip-chip packages, from early package definition through qualification and production release.
  • Experience with package implementation from die netlist to flip-chip package design and manufacturing.
  • Experience managing and resolving customer returns and field quality issues related to semiconductor packaging, particularly package assembly processes, material quality, and supplier workmanship.
  • Strong problem-solving skills with experience in root cause analysis, failure analysis, containment, corrective actions, and recurrence prevention.

Nice to have

  • Experience with Cadence Allegro Package Designer (APD) or equivalent package design tools.
  • Strong knowledge of FCBGA package reliability mechanisms, test methodologies, and qualification requirements.
  • Experience with system-level reliability assessment of large-body FCBGA packages.
  • Additional Assets
  • Subject-matter expertise in Co-Packaged Optics (CPO) and/or Near-Packaged Optics (NPO).
  • Deep technical expertise in package and substrate warpage, including characterization, modeling, material interactions, and assembly process impacts.

Compensation

  • Base salary range is $160,000 to $200,000 depending on experience, level, and business need.

This listing is sourced directly from Astera Labs Inc.'s careers page and normalized into a canonical job model.