Lattice Semiconductor
AI Architect for Software Development
San Jose, CA
Sponsorship not specified$260k-$280kDetected 20 days ago
PythonMachine LearningPyTorchNLPLLMsRAGAgentic AICustomer SuccessCustomer SupportFPGA
About the role
- Lattice Overview There is energy here…energy you can feel crackling at any of our international locations.
- Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.
- Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win.
Responsibilities
- Design multi ‑agent workflows with an orchestrator, specialized agents, and shared memory.
- Implement strict schema ‑bound LLM calls (JSON, XML, structured tool commands).
- Design prompt templates, adapters, LoRA modules, and controlled ‑generation methods.
- Build document ingestion pipelines with chunking, metadata tagging, and embeddings.
- Build domain ‑aware RAG systems with citation ‑based referencing.
- Develop multi layer guardrails using schema validation, rule based checks, and policy engines.
- Implement self critique, repair loops, and fallback strategies for model outputs.
- Build model serving pipelines (vLLM/TGI/Triton), caching, batching, and streaming.
- Implement logging, tracing, observability, and offline evaluation pipelines.
- Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions.
Requirements
- You can also follow us via Twitter, Facebook, or RSS.
Nice to have
- Define agent interfaces, policies, and error ‑handling/repair strategies.
- Select, distill, fine ‑tune, and evaluate LLM/SLM/VLA models.
- Experience with LLM fine ‑tuning (LoRA/QLoRA), distillation, and prompt engineering.
- Strong understanding of LLM internal architecture (transformers, attention, tokenization).
- Expertise in Python, PyTorch, and modern AI frameworks (HuggingFace, vLLM, LangChain).
- Experience designing structured model interactions (JSON schema, function ‑calling, tool ‑use).
- Experience with embedded, hardware, or FPGA workflows-but not mandatory.
Compensation
- In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity.
- The base pay for this role is between $260,000 to $280,000 per year.
- Base Pay Range
Benefits
- In addition to base salary, we offer an incentive plan bonus, and new hire equity for a competitive total compensation package.
- Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.
- Pay & Benefits
- Consistent with Lattice Semiconductor values and applicable law, we provide the following information to promote pay transparency and equity.
- In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity.
- In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!
Company info
- For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com.
- It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers.
- At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace.
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