Aalyria Careers

Lead RTL/FPGA Design Engineer

Remote (United States)

No sponsorshipDetected 26 days ago

PythonC++MATLABAlgorithmsCybersecurityFPGAVHDLElectrical EngineeringSignal ProcessingCommunication

About the role

You'll work directly alongside DSP algorithm developers and system architects, serving as the bridge between mathematical models and working hardware.
This is a remote position that will include occasional travel to our Mountain View office location.

Deliver end-to-end FPGA Modem Solution based on VHDL or System Verilog.
Lead the micro-architecture and RTL development for key digital signal processing (DSP) blocks in the coherent modem, including equalization, carrier recovery, and timing recovery.
Collaborate with system architects and DSP algorithm developers to translate DSP algorithm specification/ models into robust RTL designs.
Design fixed-point arithmetic RTL implementation of complex DSP blocks.
Apply low power design techniques and perform power, performance, and area (PPA) analysis.
Support functional verification, debug, and static timing closure.
Collaborate closely with firmware/software engineers to define hardware/software partitioning, define registers and interfaces, and support system-level integration and debug.
Support silicon bring-up and bench testing.
As the Lead RTL/FPGA Design Engineer on our Aalyria Space team, you will own the end to end the development of a high-performance coherent modem targeting free space optical (FSO) communications.
In this role, you'll own the RTL development of that modem from architecture through silicon bring-up.

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.
Proficiency in logic design concepts and high-quality RTL coding using VDHL/SystemVerilog.

Prior experience delivering an end-to-end FPGA communication system solution (from architecture to successful hardware validation).
Deep expertise in implementing complex DSP functions in RTL, such as adaptive equalization, carrier recovery, and timing recovery.
Proven experience in the integration of high-throughput FEC engines (e.g., LDPC, Reed-Solomon) into a high-speed data path.
Ability to convert system models (e.g., Matlab or C++) into robust fixed-point RTL implementations, including successful vector matching and verification.
Familiarity with high-speed ASIC/FPGA synthesis, place and route (P&R), and static timing analysis (STA) flows.
Experience in designing for low power and high-speed multi-gigabit/sec interfaces.
Exposure to the MAC layer (Media Access Control) or digital interface layers adjacent to the PHY.
Experience with Python, Perl, TCL and/or other scripting languages.

Competitive salary, comprehensive benefits (401(k), dental, vision, health, life insurance), paid time off, and equity options.

Compensation and Equity: Competitive salary, comprehensive benefits (401(k), dental, vision, health, life insurance), paid time off, and equity options.
Flexibility: Flexible working arrangements including hybrid remote/in-office schedules.

Aalyria is a leading technology company that supplies laser communications technology and temporospatial software-defined networking platforms to the aerospace industry.
With technology acquired from Google, Aalyria is at the forefront of innovation in satellite and airborne mesh networks, as well as cislunar and deep-space communications.
We are revolutionizing the orchestration and management of planetary mesh networks using any radio or optical spectrum, any orbit, and any hardware across land, sea, air, and space.
Work at a cutting-edge company shaping the future of aerospace communications.
Be part of a collaborative, supportive, and inclusive workplace where your contributions matter.
Ensure the design is compliant with relevant industry or company standards and specifications.
Inclusive Culture: Be part of a collaborative, supportive, and inclusive workplace where your contributions matter.

Employer Statement: Aalyria is an Equal Opportunity Employer.
We celebrate diversity and are committed to creating an inclusive environment for all employees.
We do not discriminate based on race, color, religion, sex (including pregnancy, gender identity, and sexual orientation), national origin, age, disability status, genetic information, protected veteran status, or any other characteristic protected by law.
Qualified applicants from all backgrounds are encouraged to apply.

Required Qualifications: Active Security Clearance, or the eligibility to obtain one

This listing is sourced directly from Aalyria Careers's careers page and normalized into a canonical job model.