Samsung Semiconductor
Staff Engineer, SSD Storage and Systems Architecture
San Jose, California, United States · Staff+
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odds of building a lasting career here
Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.
Lottery odds assume a STEM candidate.
Personalize to your clock →H-1B wage level
the lottery is wage-weighted — each level is one more entry
$24,075 more — $187,075 — moves this role to Level II and 2 lottery entries. That figure is inside the range the employer already advertised.
Based on the DOL prevailing wage for this occupation and worksite, a base salary of $187,075 would place this position at wage Level II. That figure is within the posted range, and I'd like to target it. This role classifies under "Software Developers" for prevailing-wage purposes.
DOL prevailing wage, 2026-27 wage year · Software Developers (15-1252) · San Jose-Sunnyvale-Santa Clara, CA. Wage level is derived by USCIS from the offered wage, occupation and worksite; the occupation shown is inferred from the job title.
Employer immigration record
from this employer's Department of Labor filings
Green-card filing pattern in this occupation
Green-card follow-through: 55%
Files H-1B transfers
Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.
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About the role
- Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.
- Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more.
- We believe innovation and growth are driven by an inclusive culture and a diverse workforce.
Responsibilities
- HW/FW Co-Design: Collaborate closely with ASIC design, firmware development, and validation teams to resolve cross-domain architectural bottlenecks in ultra-low latency environments.
- Technology Prototyping: Develop architectural simulators or FPGA prototypes to evaluate next-generation storage features, AI caching algorithms, and host-managed storage paradigms.
- Strategic IP Creation: Drive the creation of foundational architectural patents in the domains of AI storage optimization and near-data processing to protect Samsung's system-level intellectual property.
- Hyperscale AI Engagement: Jointly architect next-generation AI datacenter deployment models (e.g., custom pooling, disaggregated storage, GPUDirect Storage [GDS] integrations, and Ethernet-attached SSDs) directly with lead architects from AWS, Google Cloud, Microsoft, and Meta.
Requirements
- Industry Influence: Verified track record of architectural leadership, technical contributions to open-source storage/AI projects, or technical influence within the broader storage ecosystem.
- Workload-to-Requirement Translation: Ability to translate real application and AI workload behavior into clear storage architecture and SSD product requirements.
- Performance & Bottleneck Analysis: Ability to identify end-to-end system bottlenecks and determine whether performance limitations originate from compute, memory, PCIe fabric, software stack, or storage.
- Architecture Trade-off Management: Ability to balance performance, latency, capacity, endurance, power, thermal, reliability, scalability, and cost at the system level.
- Future Architecture Development: Ability to identify emerging storage architecture needs and propose new system and SSD concepts for next-generation AI and data center workloads.
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field with 10+ years experience, or a Master's degree with 8+ years experience, or a PhD with 5+ years experience.
- Minimum of 10+ years of direct experience in storage system architecture, including foundational hands-on experience with legacy HDD system architecture and caching algorithms alongside modern NAND flash, SSD architecture, and AI/ML data pipeline storage.
- Hyperscaler & AI Infrastructure Familiarity: Proven experience architecting or deploying storage systems that satisfy OCP Datacenter NVMe SSD Specifications and scale seamlessly within high-performance computing (HPC) or GPU-accelerated hyperscale datacenter environments.
- Protocol & Domain Mastery: Deep technical knowledge of PCIe/NVMe protocols, specialized enterprise features like GPUDirect Storage (GDS), FDP, ZNS, SSD controller internal architectures, and enterprise interfaces (NVMe-oF, CXL, SAS/SATA/SCSI).
- Samsung Portfolio Synergy: Ability to quickly master and leverage Samsung's proprietary controller capabilities, vertical NAND (V-NAND) characteristics, CXL innovations, and DRAM caching to maximize architectural efficiency for AI workloads.
- Communication Skills: Exceptional written and verbal English communication skills, with a proven ability to pitch complex architectural designs, author technical specs, and build consensus across multi-disciplinary global teams.
- System-Level Architecture Thinking: Ability to evaluate storage as part of the complete system architecture, considering compute, memory, interconnect, networking, local storage, and shared storage together.
- Storage Hierarchy Design: Ability to define optimal data placement and tiering across memory, cache, local NVMe, shared storage, and capacity tiers based on workload characteristics.
Skills
- System-Level Architecture Thinking:
- Workload-to-Requirement Translation:
- Ability to translate real application and AI workload behavior into clear storage architecture and SSD product requirements.
- Performance & Bottleneck Analysis:
- Storage Hierarchy Design:
- Architecture Trade-off Management:
- Ability to balance performance, latency, capacity, endurance, power, thermal, reliability, scalability, and cost at the system level.
- Future Architecture Development:
- Key Competencies
Compensation
- $163,000 - $253,000 USD
Benefits
- This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones.
- In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves.
- Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.
- Care for Family Whatever family means to you, we want to support you along the way-including a stipend for fertility care or adoption, caregiver support, and medical travel support.
- Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.
- Embrace Flexibility Benefits are best when you have the space to use them.
- That's why we facilitate a flexible environment so you can find the right balance for you.
- Our onsite Café and gym, plus virtual classes, make it easier.
Company info
- Our Commitment to Innovation and Fairness At Samsung Semiconductor, we use Artificial Intelligence (AI) tools in the recruitment process to enhance efficiency.
Equal opportunity
- Employment Policy
- Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.
- When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication.
- We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support.
This listing is sourced directly from Samsung Semiconductor's careers page and normalized into a canonical job model.