Nexperia
Project Design Lead (EX)
San Jose · Full-time
Sponsorship not specifiedDetected 30 days ago
Machine LearningRecruitingCadenceFPGAVerilogElectrical EngineeringResearch
About the role
- Full time employment, Monday - Friday, 40 hours per week, $188,760.00 per year.
- Telecommuting permitted up to 3 days per week.
- Talent acquisition based on Nexperia vacancies is not appreciated.
Responsibilities
- Project Design Lead, Nexperia USA Inc.,
- Design digital logic circuits for integration into mixed-signal integrated circuits (ICs), including finite state machines, control logic, data path components, and interface blocks, based on product requirements and system architecture specifications.
- Perform static design verification including Lint checking to ensure code quality, Clock Domain Crossing (CDC) analysis to validate synchronization of asynchronous clocks and Reset Domain Crossing (RDC) analysis to confirm correct handling of resets across domains.
- Analyze simulation, synthesis, and timing reports to validate design quality and correct operation under different process-voltage-temperature (PVT) conditions.
- Translate system and product definition documents into digital architecture, block-level specifications, and micro-architecture definitions, and document digital design implementation details.
- Generate behavioral models of analog or mixed-signal components using high-level modeling techniques (e.g., SystemVerilog, Verilog-A) to enable mixed-signal simulation and validate digital-analog interaction early in the design process.
- Build Field Programmable Gate Array (FPGA) prototypes for digital logic emulation, perform functional tests using application-level scenarios, and collaborate with firmware teams for pre-silicon validation and debugging.
- Participate in post-silicon bring-up by analyzing lab measurements and test data, identifying root causes of issues, comparing silicon behavior with simulation models, and recommending fixes or design changes.
- Collaborate with cross-functional teams including analog designers, system engineers, software developers, and CAD/methodology engineers to define requirements and integrate AI-enhanced solutions into production design workflows.
Requirements
- Must have a Master's degree in Electrical Engineering, Computer Engineering, or a related field and 2 years of experience in digital integrated circuit (IC) design and verification.
- Alternatively, the employer will accept a Bachelors degree in Electrical Engineering, Computer Engineering, or a related field and 4 years of experience in digital integrated circuit (IC) design and verification.
- Must have 2 years of experience in each of the following:
- Must have 2 years of experience in each of the following: Experience with digital circuit design and verification for mix-signal chip products
- Experience working in at least one project in verification environment and platform setup
- Experience with RTL design using Verilog or SystemVerilog
- Experience with static design checks including Lint, CDC, and RDC
- Experience with FPGA prototyping and pre-silicon validation
- Experience with post-silicon debugging
- A proven global player with an entrepreneurial mentality.
Compensation
- Full time employment, Monday - Friday, 40 hours per week, $188,760.00 per year.
Benefits
- Develop scripts, ML models, or AI-based tools to optimize verification workflows, automate debugging tasks, extract features from simulation datasets, and enhance RTL code quality and coverage metrics.
Visa & Work Authorization
- that does not discriminate on the basis of actual or perceived race, color, creed, religion, national origin, ancestry, citizenship status, age, sex or gender (including pregnancy, childbirth and pregnancy-related condit
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