Marvell Technology
Principal Validation Engineer
Santa Clara, CA, USA · Principal
Sponsorship not specified$151k-$226kDetected 28 days ago
NLPElectrical EngineeringCommunicationProblem Solving
About the role
- At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow.
- Expected Base Pay Range (USD) 150,680 - 225,700, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
Responsibilities
- Working knowledge of board design; able to read board schematics and board layout.
- Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time.
Requirements
- Strong understanding of high-speed SERDES, equalization technique and PCIe, UALink and Ethernet protocols.
- 5+ years experience with High Speed IO testing, debugging and validation
- Strong lab skills with hands on experience, in system bring up, system testing and debug.
- In-depth working knowledge of test equipment used for SERDES characterization (Scope, BERT, Network analyzer, etc.).
- As such, applicants must be eligible to access export-controlled information as defined under applicable law.
- Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State.
Nice to have
- Working knowledge of PCIe interface and characterization.
- Working knowledge and experience on Ethernet and/or UALink is a definite plus.
- Extensive knowledge of the physical and protocol levels (PIPE I/F, PCS, MAC) of one or more common high-speed interfaces is an asset.
- able to read board schematics and board layout.
- Knowledge in SERDES modeling techniques Working experience with Python.
Skills
- Complete responsibility for PHY and functional Validation in post-silicon environment.
- Defining, documenting, executing and reporting the overall validation/test plan for Marvell switch devices
- Analyze and debug issues on PHY protocol of storage interface (PCIe, UALink, Ethernet)
- Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
Compensation
- Expected Base Pay Range (USD) 150,680 - 225,700, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
Equal opportunity
- All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
- Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Visa & Work Authorization
- export control laws and regulations, including the Export Administration Regulations (EAR)
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This listing is sourced directly from Marvell Technology's careers page and normalized into a canonical job model.