Renesas Electronics

Principal Engineer, Automated Derivatives

Austin, TEXAS, United States · Principal

Sponsorship not specified$12k-$15kDetected 25 days ago

PythonFull-Stack DevelopmentGitCI/CDJenkinsMachine LearningLLMsExcelVerilogElectrical Engineering

About the role

With a diverse team of over 22,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation.
For more information, please read our Diversity & Inclusion Statement.
Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations.

Derivative Generation: Develop scripts and Generative AI prompts to automate the creation of RTL wrappers, memory maps, and bus interconnects for design variants.
Logic Optimization: Employ AI to identify redundant logic or clock-gating opportunities to hit aggressive power targets in derivative designs.
Seamless Handoff: Ensure a "zero-friction" path from RTL to Physical Design by using AI to automatically generate floorplan constraints and timing assertions from the design spec.
Closure Acceleration: Drive the physical implementation of derivatives, using AI to "reuse" placement and routing solutions from parent designs to achieve 10x faster convergence.
Physical Design Foundation: Solid understanding of Synthesis, P&R, and STA (Static Timing Analysis) to ensure RTL is physically realisable.
ML/AI Integration: Expert Python skills to build and deploy models that interface with both simulation tools (VCS, Xcelium) and implementation tools (Innovus, ICC2).
Version Control & CI/CD: Mastery of Git and CI/CD pipelines (Jenkins/GitLab) to manage the high-velocity deployment of design derivatives.
We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ' To Make Our Lives Easier.'
Are you ready to own your success and make your mark?

Minimum of a Master's degree in Electrical Engineering, Computer Science, or Computer Engineering.
Proficiency in SystemVerilog for RTL design and UVM for functional verification.
Full-Stack Hardware Mastery: Proficiency in SystemVerilog for RTL design and UVM for functional verification.
At Renesas, you can:

Automated Testbench Scaling: Build AI-driven verification environments that automatically adjust constraints and coverage goals when a design derivative (e.g., changed cache size or port count) is instantiated.
Education: Minimum of a Master's degree in Electrical Engineering, Computer Science, or Computer Engineering.
Maximize your performance and wellbeing in our flexible and inclusive work environment.

Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people's lives easier, safe and secure.

Renesas Electronics is an equal opportunity and affirmative action employer, committed to celebrating diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by federal, state or local law.

This listing is sourced directly from Renesas Electronics's careers page and normalized into a canonical job model.