Altera

Altera

Analog Circuit Design Engineer

San Jose, California, United States · Senior

Sponsorship not specified$149k-$216kDetected 30 days ago
Data AnalysisFPGAVerilogElectrical EngineeringCommunicationCollaborationTime Management

About the role

  • You should be a motivated team-player who is able to work with cross-functional and cross-geo teams to understand, articulate and solve problems.
  • Work with custom layout team to define plan (floorplan, routing, matching, metal grid etc) to meet circuit performance
  • Collateral generation like circuit Integration spec, BMOD, timing model, power model, ICCT, IBIS, alpha numbers.

Responsibilities

  • Technical path-finding, innovation, micro-architecture and design of analog/mixed-signal circuits including regulators and bandgaps to meet architectural specifications in advanced process nodes.
  • Contribute to architectural trade-off studies and design methodology improvements.
  • Design, develop and deliver circuit building block schematic, perform pre layout and post layout design optimization to meet design specification across PVT, process variation sensitivity analysis, aging, EOS, RV checks for design reliability.
  • Own specifications and design verification plans covering functionality, performance and reliability meeting high volume productization requirement.
  • Collaborate with logic designer, logic verification designer, structural physical design engineers, integration engineers, signal integrity and power deliver engineer to define clear collateral handoff requirements to ensure efficient IP integration.
  • Perform post silicon data analysis and debug and make necessary design enhancement to meet design specification.
  • Conduct design reviews; actively contribute to design reviews
  • Work with external IP vendors as point of contact for analog designs

Requirements

  • BSEE/MSEE/PhD in Electrical Engineering or equivalent with a minimum of 10 years of experience in analog/mixed signal, high speed, or high voltage IO designs and 10+ years of experience in the following:
  • Direct design experience with analog and mixed signal circuits like amplifiers, comparators, regulators, ADC, high speed transmitters and receivers (SerDes, PAM-4, PCIe, DDR, etc.).
  • Exposure to analog/mixed signal circuit design and layout flow and running post-layout simulations
  • Solid understanding of analog design trade-offs and design for process variation and reliability in modern CMOS technologies
  • Proficient in circuit design tools like Virtuoso, Spice, StarRC, Totem etc
  • Understanding of Verilog, static timing analysis, UPF and related aspects of mixed signal design

Nice to have

  • Experience with high-speed receivers
  • Shift 1 (United States of America)
  • San Jose, California, United States
  • Posting Statement:

Skills

  • Good communication and presentation skills to enable cross functional collaboration
  • Effective prioritization and time management skills
  • Willing to work in a dynamically changing, cross geographical, cross functional environment
  • Be a team player and willing to work autonomously and also collaboratively/flexibility in a team environment
  • Be a mentor and willing to guide/train upcoming engineers
  • Salary Range
  • The pay range below is for Bay Area California only.
  • Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc.
  • $149,100 - $215,925 USD
  • Applicants must be eligible for any required U.S. export authorizations.
  • About Altera

Compensation

  • The pay range below is for Bay Area California only.
  • Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc.
  • We also offer incentive opportunities that reward employees based on individual and company performance.
  • $149,100 - $215,925 USD

Company info

  • An important part of this role is delivering all aspects of the design and collateral, including timing and reliability collateral.

This listing is sourced directly from Altera's careers page and normalized into a canonical job model.