CyberCoders
Verification Engineer
San Jose, San Miguel County
Sponsorship not specifiedDetected 34 days ago
Verilog
About the role
- Job Description Job Description Verification Engineer Verification Engineer Position Overview We are seeking a Verification Engineer to develop and execute verification strategies for complex digital designs and SoC blocks. The role focuses on building robust SystemVerilog/UVM testbenches, creating directed and constrained-random tests, automating
- verification flows with scripting, and collaborating with RTL designers and integration teams to ensure silicon quality and performance for protocols…
Responsibilities
- The role focuses on building robust SystemVerilog/UVM testbenches, creating directed and constrained-random tests, automating verification flows with scripting, and collaborating with RTL designers and integration teams to ensure silicon quality and performance for protocols…
Company info
- Job Description Job Description Verification Engineer Verification Engineer Position Overview We are seeking a Verification Engineer to develop and execute verification strategies for complex digital designs and SoC blocks.
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