A2E Technologies 1
SR. FPGA Design Engineer w/Active Clearance
San Diego, California, United States · Senior · Full-time
No sponsorshipDetected 718 days ago
FPGAVHDL
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16Unrated
Cap-exempt (no lottery)0
Sponsors this role0
Entry-level history0
PERM / green-card track0
Lottery odds40
Fits your clock70
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About the role
- Title: FPGA Design Engineer Location: San Diego (Onsite) Term: Contract Duration: Long Term Start: ASAP Required: Active Clearance
- 10+ years experience FPGA Design Engineer,.Strong VHDL Skills, Deep experience with Bring-Up, Experience in Cryptography is preferred. Good experience with Packet handling and External digital interfaces Required. Experience with Microchip FPGAs a Plus Active Government Clearance Required Onsite Full-Time Required
Nice to have
- Active Clearance
- 10+ years experience FPGA Design Engineer,.Strong VHDL Skills, Deep experience with Bring-Up, Experience in Cryptography is preferred.
- Good experience with Packet handling and External digital interfaces Required.
- Any unsolicited resumes sent to A2e, including unsolicited resumes sent to a A2e mailing address, fax machine or email address, directly to A2e employees, or to A2e's resume database will be considered A2e property.
- A2e will NOT pay a fee for any placement resulting from the receipt of an unsolicited resume.
- Agencies are hereby specifically directed NOT to contact A2e employees, A2e's recruiting team, or other authorized A2e personnel, in an attempt to present candidates.
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