Cisco

Cisco

ASIC Design Verification Engineer

San Jose, California, US · Full-time

Sponsorship not specified$155k-$223kDetected 4 days ago
VerilogCiscoCollaboration

Stay score

odds of building a lasting career here

64Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role100
Entry-level history0
PERM / green-card track0
Lottery odds (Level IV)94
Fits your clock70

Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.

Lottery odds assume a STEM candidate.

Personalize to your clock →

H-1B wage level

the lottery is wage-weighted — each level is one more entry

Level I · 1×
Level I$124,4051 entry
Level II$155,8962 entries
Level III$187,4083 entries
Level IV$218,8994 entries

$896 more — $155,896 — moves this role to Level II and 2 lottery entries. That figure is inside the range the employer already advertised.

Based on the DOL prevailing wage for this occupation and worksite, a base salary of $155,896 would place this position at wage Level II. That figure is within the posted range, and I'd like to target it. This role classifies under "Electronics Engineers, Except Computer" for prevailing-wage purposes.

DOL prevailing wage, 2026-27 wage year · Electronics Engineers, Except Computer (17-2072) · San Jose-Sunnyvale-Santa Clara, CA. Wage level is derived by USCIS from the offered wage, occupation and worksite; the occupation shown is inferred from the job title.

Employer immigration record

from this employer's Department of Labor filings

Green-card filing pattern in this occupation

Context, not a finding about this posting: of this employer's 35 green-card filings in this occupation, 100% were for a worker who already held the job.

Green-card follow-through: 93%

Of 517 labor certifications old enough to have been used, 34 expired without the employer filing the next step. Median time from filing to decision: 485 days.100% of their filings were for a worker who already held the job.Only certifications past the 180-day window are counted — recent ones cannot have expired yet.

Files H-1B transfers

363 transfer filings in the last year, covering 1371 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.

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About the role

  • Join us to power the future of the digital world.
  • Your collaboration with designers, architects, and software teams will help guarantee seamless integration and optimal performance of Cisco's hardware platforms.

Responsibilities

  • As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco's revolutionary data center solutions.
  • Architect, develop, and maintain block, cluster, and top-level Design Verification (DV) environment infrastructure.
  • Build DV environments from scratch for block and cluster levels.
  • Develop, implement, and enhance test plans and tests for block and cluster verification, using both constraint-random and directed stimulus.
  • Qualify RTL design by running Gate Level Simulations on netlists.
  • Collaborate with designers, architects, and software teams to debug issues during post-silicon bring-up and integration.
  • Support design testing in emulation environments.

Requirements

  • Bachelors degree + 5 years of ASIC experience, or Masters degree+ 3 years of ASIC experience, or PhD + 0 years of related experience.
  • Experience in System Verilog and UVM methodology.
  • Experience with scripting using Perl and/or Python.

Nice to have

  • Experience with forwarding logic, parsers, or P4.
  • Experience using emulation platforms such as Veloce, Palladium, Zebu, or HAPS.
  • Knowledge of formal verification tools (e.g., IEV or VC Formal).
  • Domain knowledge in one or more protocols such as PCIe, CXL, Ethernet, RDMA, DDR, or TCP.
  • We work as a team, collaborating with empathy to make really big things happen on a global scale.
  • Because our solutions are everywhere, our impact is everywhere.
  • Message to applicants applying to work in the U.S. and/or Canada:
  • U.S. employees are eligible for paid time away as described below, subject to Cisco's policies:

Compensation

  • The starting salary range posted for this position is $155,000.00 to $222,600.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benef

Benefits

  • You'll architect and develop DV infrastructure, create and execute comprehensive test plans, and ensure robust verification and coverage for complex chips.
  • Ensure comprehensive verification coverage through code and functional coverage implementation and review.

Company info

  • We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow.
  • At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond.
  • These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

This listing is sourced directly from Cisco's careers page and normalized into a canonical job model.