Intel
DFT Implementation Engineer
US, Texas, Austin
Sponsorship not specified$142k-$200kDetected 8 hours ago
PythonCadenceVHDLVerilogElectrical EngineeringLeadership
About the role
- It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
- Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
Responsibilities
- Develop logic design and register transfer level (RTL) coding to support DFT features such as SCAN, MBIST, and BSCAN.
- Provide timing closure support and test content generation for manufacturing.
- Collaborate in defining architecture and microarchitecture features for blocks, subsystems, and SoCs under DFT.
- Drive verification efforts to ensure architecture and microarchitecture specifications are achieved.
- Support IP and SoC integration to ensure high-quality implementation of DFT blocks.
- Develop high-volume manufacturing (HVM) content for rapid bring-up and production on automatic test equipment (ATE).
- Collaborate with post-silicon and manufacturing teams to verify features on silicon and document learnings for continuous improvement.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
- 5+ years of experience in DFT, SoC design, or related semiconductor design areas
- Hands-on experience with ATPG, scan insertion, and/or MBIST/repair
- Tessent Shell flows and SSN methodology
- RTL design experience using hardware description languages such as Verilog, VHDL, or SystemVerilog
Nice to have
- Tessent Fast IO, ISTK, and related methodologies
- Understanding of industry standards such as IEEE 1687 (IJTAG), IEEE 1149.1 (JTAG), IEEE 1500 (Core Test), and IEEE 1838
- Experience with industry-standard DFT tools such as Siemens EDA (Mentor) Tessent, Synopsys DFT Compiler, or Cadence Modus
- Proficiency in scripting languages such as TCL, Perl, or Python for design automation
- Experience working across cross-functional teams or contributing to complex SoC projects
- Take the next step in your career journey by joining Intel's innovative team.
- Start driving meaningful change in the world of technology today.
Compensation
- $141,910.00-200,340.00 USD
- The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
- Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
- Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
- Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment.
- If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Benefits
- Find out more about the benefits of working at Intel.
- Optimize designs to meet power, performance, area, timing, and test coverage goals while adhering to design integrity standards.
- Drive high test coverage through structural and IP-specific tests to achieve product quality and defect-per-million (DPM) objectives.
Company info
- We offer a total compensation package that ranks among the best in the industry.
This listing is sourced directly from Intel's careers page and normalized into a canonical job model.