Nvidia

Nvidia

SRAM Design Engineer

US, CA, Santa Clara · Mid

Sponsorship not specifiedDetected 6 days ago
CadenceElectrical Engineering

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odds of building a lasting career here

42Risky
Cap-exempt (no lottery)0
Sponsors this role100
Entry-level history0
PERM / green-card track0
Lottery odds40
Fits your clock70

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Employer immigration record

from this employer's Department of Labor filings

Green-card filing pattern in this occupation

Context, not a finding about this posting: of this employer's 843 green-card filings in this occupation, 97% were for a worker who already held the job.

Green-card follow-through: 95%

Of 584 labor certifications old enough to have been used, 29 expired without the employer filing the next step. Median time from filing to decision: 497 days.97% of their filings were for a worker who already held the job.Only certifications past the 180-day window are counted — recent ones cannot have expired yet.

Files H-1B transfers

620 transfer filings in the last year, covering 1241 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.

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About the role

  • NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years.
  • It's a unique legacy of innovation that's fueled by great technology-and amazing people.
  • Today, we're tapping into the unlimited potential of AI to define the next era of computing.

Responsibilities

  • Embedded SRAM design: Transistor-level circuit design, supervising layout implementation, physical and logical verification, and debug of SRAM macros.
  • Advanced development: Exploring the potential of future process nodes and developing techniques to realize optimal power, performance, and area characteristics.
  • Guiding SOC design, silicon test, and productization efforts: Collaborate with SOC design partners to help them achieve their overall performance and cost goals, guide the silicon test and characterization efforts, and working with productization teams to prepare new silicon for the demanding requirements of real-world applications.
  • Come join the team and see how you can make a lasting impact on the world.The Digital IP (DIP) group at NVIDIA develops IP for every chip designed at NVIDIA.
  • This group works closely with internal SOC design, silicon testing, and productization teams that turn our IP into products that change the world.
  • One of the roles fulfilled by the DIP group is to develop sophisticated SRAM compilers that are used extensively by our SOC design partners.
  • Exploring the potential of future process nodes and developing techniques to realize optimal power, performance, and area characteristics.
  • Guiding SOC design, silicon test, and productization efforts:

Compensation

  • The more developed your skills in this area, the better Silicon testing and debugging experience Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
  • The base salary range is 116,000 USD - 189,750 USD.

Benefits

  • Doing what's never been done before takes vision, innovation, and the world's best talent.

Company info

  • We are looking to hire a skilled and creative SRAM circuit designer to help achieve these goals in a high-visibility position.

Equal opportunity

  • NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer.

This listing is sourced directly from Nvidia's careers page and normalized into a canonical job model.