Micron
Principal Design Engineer
San Jose, CA · Principal · Full-time
Sponsorship not specified$176k-$298kDetected 8 days ago
Machine LearningLLMsRAGAgentic AIElectrical EngineeringLeadershipCommunicationMentoring
About the role
- Our vision is to transform how the world uses information to enrich life for all.
- Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
- Our salary ranges are determined by role, level, and location.
Responsibilities
- Rearchitect existing design, verification, and debug workflows so that AI is a first-class participant, not a bolt-on.
- This includes restructuring specification documents, simulation setups, review checklists, and hand-off artifacts to be AI-consumable; building prompt libraries, agents, and scripts that automate recurring engineering patterns; and defining new review and sign-off flows that leverage AI-generated analysis.
- Manage, design, and verify major IO/datapath blocks (input receiver, serializer, deserializer, clock distribution, equalizer, ZQ calibration, ONFI training features, wave pipelines) to rigorously meet performance specifications - employing AI-assisted exploration, sizing, and verification wherever it accelerates convergence.
- Collaborate closely with project integration and other functional design teams to define and negotiate block interface specifications.
- Liaise with Applications Engineering (Apps) to evaluate new specifications, balancing customer needs against design and physical constraints.
- You will act as a key technical leader, driving task forces, making architectural decisions to hit aggressive data-rate and power targets, and setting the standard for how an AI-augmented design engineer operates.
- Beyond individual productivity, you will mentor the team on how to think, plan, and implement in an AI-first environment.
Requirements
- Bachelors or Masters degree in Electrical Engineering or a related field with 8+ years of relevant IC design experience.
- Candidates must be able to describe concrete examples where AI meaningfully changed their productivity or design outcome.
- However, all information provided must be accurate and reflect the candidate's true skills and experiences.
Nice to have
- Familiarity with prompt engineering, retrieval-augmented generation (RAG), fine-tuning, or agentic frameworks applied to engineering workflows.
- Experience with DRAM interfaces (e.g., DDR4/5, LPDDR5/6, HBM3/3E/4) or other high-speed industry-standard interfaces.
- Comprehensive understanding of sophisticated CMOS device physics, device reliability mechanisms, BSIM modeling, and CMOS targets for high-speed IO operation.
- $176,000.00 - $298,000.00 a year
- The pay scale is subject to change depending on business needs.
- Micron is proud to be an equal opportunity workplace and is an affirmative action employer.
- To learn about your right to work click here.
- To learn more about Micron, please visit micron.com/careers
Skills
- Continuously identify tasks where AI can replace, accelerate, or augment manual effort, and embrace new tools rapidly as they emerge.
Compensation
- The US base salary range that Micron Technology estimates it could pay for this full-time position is:
Benefits
- Additional compensation may include benefits, bonuses and equity.
- Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.
- Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training.
Visa & Work Authorization
- ve consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protec
This listing is sourced directly from Micron's careers page and normalized into a canonical job model.