Astera Labs Inc.
Product Tech Lead
San Jose, California, United States · Senior
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About the role
- Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
- This is a high-impact technical role at a hyper-growth company.
- If you want to ship silicon that defines AI infrastructure, this is the team.
Responsibilities
- Own RTL design for assigned blocks from microarchitecture through synthesis sign-off
- Develop high-quality, synthesizable Verilog/SystemVerilog with strong attention to PPA
- Drive design reviews, lint, CDC, and timing closure activities to silicon-ready quality
- Partner with architecture to translate specifications into implementation-ready microarchitecture
- Work with DFT and physical design teams on scan, BIST, floorplanning, and timing closure
- Mentor junior engineers and contribute to design methodology, scripts, and best practices
- Drive structured, data-driven design decisions in support of aggressive tapeout schedules
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- Strong proficiency in Verilog/SystemVerilog, RTL coding, and synthesis flows
- Hands-on experience with timing closure, CDC, lint, and low-power design techniques
Nice to have
- MS or PhD in Electrical Engineering or Computer Engineering
- Experience with PCIe Gen5/Gen6, CXL, UALink, UCIe, or Ethernet MAC/PCS designs
- Familiarity with formal verification, emulation, or assertion-based methodologies
- Background in advanced process nodes (7nm, 5nm, or below)
- Strong debug skills across pre-silicon and post-silicon environments
Skills
- RTL Design & Implementation
- Cross-Functional Execution
- Technical Leadership & Quality
- Debug complex pre-silicon and post-silicon issues across RTL, gate-level, and emulation environments
Compensation
- The base salary range is $160,000 USD - $200,000 USD.
Benefits
- Collaborate with verification on testplans, coverage closure, and bug triage
This listing is sourced directly from Astera Labs Inc.'s careers page and normalized into a canonical job model.