Nuvacore

Nuvacore

Lead SOC Architect

United States · Senior

Sponsorship not specified$200k-$300kDetected 30 days ago
Node.jsCybersecurityElectrical Engineering

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odds of building a lasting career here

59Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role80
Entry-level history0
PERM / green-card track0
Lottery odds (Level IV)94
Fits your clock70

Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.

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Files H-1B transfers

8 transfer filings in the last year, covering 8 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

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About the role

  • processor complex integration, fabric topology, system level cache hierarchy, I/O, power management, and memory subsystem.
  • Size, partition, and place system-level caches and determine their interaction with the fabric and home nodes.
  • PCIe and CXL controller integration and topology.

Responsibilities

  • Nuvacore is building a new general-purpose CPU core for AI-era, data-center-scale workloads.
  • You'll set architectural direction, make the system-level trade-offs, and work across design, verification, physical design, and software to see them through.
  • Own the overall SoC architecture:
  • Architect the coherent fabric - interconnect/NoC topology, home node design and placement, snoop filtering, and cache coherency protocol (e.g., CHI/ACE-class) - balancing bandwidth, latency, and QoS.
  • Drive memory subsystem architecture:
  • DDR5/DDR6 and LPDDR5/LPDDR6 controller design, interleaving, and DRAM QoS/scheduling.
  • Own the overall SoC architecture: processor complex integration, fabric topology, system level cache hierarchy, I/O, power management, and memory subsystem.
  • Drive memory subsystem architecture: DDR5/DDR6 and LPDDR5/LPDDR6 controller design, interleaving, and DRAM QoS/scheduling.
  • Partner with physical design and packaging teams on floorplan, 2.5D/3D packaging, and power/thermal trade-offs.
  • Author and own architecture specs; drive reviews to closure with design, verification, and software.

Requirements

  • 20+ years in SoC or system architecture, from definition through tape-out and production.
  • Working knowledge of PCIe/CXL I/O architecture and System MMU/IO virtualization.
  • Experience with die-to-die interconnect and chiplet-based partitioning.
  • Track record integrating in-house and third-party IP, including direct work with vendors and internal IP teams.
  • Working knowledge of power architecture/management and security architecture at the SoC level.
  • MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent experience.

Compensation

  • $200k-$300k

Company info

  • Founded by veteran CPU and system architects from world-class companies and backed by Sequoia Capital, we're a clean-sheet build with no legacy architecture to carry forward.
  • We're looking for a Lead SoC Architect to own the SoC architecture surrounding our CPU core - fabric, memory, I/O, power, and security.

This listing is sourced directly from Nuvacore's careers page and normalized into a canonical job model.