Axiado Corporation
Senior FPGA Design Engineer
San Jose, CA, United States · Senior
Sponsorship not specifiedDetected 63 days ago
Node.jsCybersecurityFPGA5G/LTEResearchCommunicationProblem Solving
About the role
- Our technology protects the world's most critical infrastructure-from data centers to nextgeneration cloud and AI platforms-by securing systems at the foundation levels of hardware, independent of host CPUs and operating systems.
- We value curiosity, execution, respect, and a shared desire to make a meaningful impact on the security and reliability of the digital world.
- If you're driven to innovate, energized by hard problems, and excited to help define the future of secure AI infrastructure, we invite you to apply and join us on this journey.
Responsibilities
- RTL design for FPGA, including RTL porting, IP integration, closing timing and generating bit streams
- Work with SW team to bringup and validate FPGA system product
Requirements
- Product experience with FPGAs and related tools such as Vivado and Protocompiler
- Experience in RTL simulation testing
- Experience in bringing up and debugging SW on FPGA systems
- Familiarity with PCIe, USB, Ethernet, SPI.
Nice to have
- Self-driven, good problem solving and communication skills
- BS or MS (preferred) degree in EE/EECS/CS or equivalent.
- At least 5 years of industrial experience
Skills
- Company Description
Benefits
- Working hard and smart, continuous learning and mutual support are all part of who we are.
Company info
- We are headquartered in the heart of Silicon Valley, with access to the world's leading research, technology and talent.
- We are building an exceptional team to secure every node on the internet.
Equal opportunity
- Axiado is an Equal Opportunity Employer.
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