Mythic
Senior Design Verification Engineer
Austin, TX · Senior
Sponsorship not specified$120k-$225kDetected 287 days ago
PythonLLMsFPGAVerilogRoboticsElectrical EngineeringSignal ProcessingCommunication
About the role
- This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments.
- Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from -40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.
- We've raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.
Responsibilities
- Leverage architecture models and emulation environments to help verify large AI network functionality on the design.
- Collaborate with RTL designers and architects to verify subsystems such as scheduling fabrics, interconnects, DMA engines, and memory controllers.
- We're hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life.
- At Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our novel digital dataflow architecture, which includes a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines that work together with our Analog Compute Engines to accelerate AI workloads.
- DV engineers collaborate closely with RTL design, architecture modeling, custom analog IP, compiler, emulation, and post-silicon teams to ensure the full system operates as intended.
Requirements
- Bachelor's, Master's, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science.
- Knowledge of verification methodologies (UVM or similar).
- Experience verifying one or more of the following: scheduling subsystems, high-performance interconnects, DMA engines, or memory subsystems.
- Proven track record of first-pass silicon success.
Nice to have
- Experience with emulation or FPGA prototyping for large-scale designs.
- Exposure to formal verification methods and tools.
- Familiarity with power-aware and performance-driven verification flows.
- Prior experience verifying AI, DSP, or other highly parallel architectures.
- Strong scripting skills (Python or similar) for automation and infrastructure development.
- Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together.
- We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.
Compensation
- The salary range for this position is $120,000–$225,000+ annually.
Benefits
- Development of test plans and coverage plans.
Company info
- Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost.
- The salary range for this position is $120,000-$225,000+ annually.
- Actual compensation depends on experience, skills, qualifications, and location.
- Design Verification at Mythic: At Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our novel digital dataflow architecture, which includes a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines that work together with our Analog Compute Engines to accelerate AI workloads.
- Because today's AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches-combining simulation, modeling, and innovative verification strategies-to prove that neural networks will function correctly and efficiently.
- We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.
- Hands-on system-level and block-level verification.
- Testbench development and execution using UVM or other advanced DV methodologies.
- Creation of verification infrastructure and flows.
- Requirements
- 8+ years of industry experience developing verification testbenches.
- Solid understanding of computer architecture, including datapaths, memory hierarchies, and interconnects.
- Understanding of Verilog, SystemVerilog, and UVM.
- Strong communication skills, both written and spoken.
- Preferred Qualifications
- Knowledge of coverage-driven verification and advanced stimulus generation techniques.
This listing is sourced directly from Mythic's careers page and normalized into a canonical job model.