Altera
FPGA Development Tools Engineer – Synthesis
San Jose, California, United States
Sponsorship not specified$187k-$271kDetected 30 days ago
PythonC++Data StructuresAlgorithmsFPGAVHDLVerilogElectrical EngineeringCollaborationProblem Solving
About the role
- Job Details: Job Description: Altera is a leader in FPGA innovation, delivering programmable solutions that power AI, cloud computing, networking, and edge applications.
- Position Overview Altera is seeking a FPGA Development Tools Engineer to join our Synthesis team, focused on advancing the next generation of FPGA compilation technology.
- The pay range below is for Bay Area California only.
Responsibilities
- Design, implement, and optimize synthesis algorithms to convert RTL (Verilog/SystemVerilog/VHDL) into efficient gate-level representations.
- Develop tools and methodologies for analyzing and transforming complex RTL designs.
- Analyze synthesis results, debug issues (timing, logic structure, mapping), and drive resolution.
- Develop internal tools, scripting, and automation to improve synthesis flows and productivity.
- FPGA or ASIC design flows (synthesis → P&R → STA)
Requirements
- 10+ years of experience in FPGA/ASIC design, EDA tools, or related fields
- Strong hands-on experience with:
- Applicants must be eligible for any required U.S. export authorizations.
Nice to have
- Experience with synthesis tools or FPGA toolchains (e.g., Quartus, Vivado )
- Knowledge of FPGA architectures (LUTs, DSPs, BRAM, interconnect)
- Familiarity with advanced optimizations (e.g., retiming, logic restructuring, resource sharing)
- Scripting experience (e.g., Python, Tcl )
- Background in compiler development or EDA algorithms
- Experience working in large, distributed engineering teams
- Influence compiler architecture and performance at scale
- Shift 1 (United States of America)
Skills
- Proficiency in C/C++ for tool development
- Strong understanding of algorithms and data structures
- Familiarity with debugging and performance analysis
- EDA / CAD Knowledge:
- Understanding of:
- Logic synthesis and optimization techniques
- Timing-driven design considerations
- Problem Solving:
- Education:
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
Compensation
- The pay range below is for Bay Area California only.
- Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc.
- We also offer incentive opportunities that reward employees based on individual and company performance.
This listing is sourced directly from Altera's careers page and normalized into a canonical job model.