Cadence
Mixed Signal Systems and Verification Engineer I
MOUNT-ROYAL (Montreal)
Sponsorship not specifiedDetected 6 hours ago
PythonGitMachine LearningCadenceFPGAVerilogElectrical EngineeringControlsCommunication
About the role
- Cadence fosters a high‑performance culture that values creativity, innovation, and technical excellence.
- Cadence has been recognized globally as a Great Place to Work and has been named one of the Fortune 100 Best Companies to Work For multiple times.
- Ingénieur(e) systèmes et vérification en signaux mixtes II Chez Cadence, nous recrutons et développons des leaders et des innovateurs qui souhaitent avoir un impact significatif sur l'avenir de la technologie.
Responsibilities
- Develop accurate, simulation‑efficient analog and mixed‑signal behavioral models (RNM) in SystemVerilog.
- Verify that behavioral models accurately represent analog schematics and design intent.
- Support verification of blocks such as filters, ADC/DAC, VCO, A/DPLL, SerDes, LNA, mixers, and related AMS IP.
- Develop and maintain verification infrastructure including testbenches, environments, and scripts.
- Document modeling assumptions, verification methodology, and results for formal design and verification reviews.
- The Mixed‑Signal Verification Team is seeking a Mixed‑Signal Systems and Verification Engineer II to contribute to the verification of complex digital and mixed‑signal designs.
- In this highly visible role, you will collaborate closely with analog, digital, and systems teams and play a critical role in delivering high‑quality silicon to market.
Requirements
- 0-2+ years of experience working in digital, analog, or mixed‑signal design and verification environments.
- Bachelor's degree in Electrical Engineering or related field
- Strong understanding of SystemVerilog and mixed‑signal verification concepts.
- Experience or coursework in real‑number modeling (RNM) including:
- Familiarity with Cadence Virtuoso Schematic Composer and ADE.
- Strong written and verbal communication skills with the ability to work across teams.
Nice to have
- Experience with low‑power architectures.
- Exposure to SystemVerilog UVM methodologies.
- Experience with FPGA prototyping.
- Familiarity with industry standards such as PCIe, USB, DDR, or similar.
- Knowledge of mixed‑signal Cadence tools and mixed‑signal verification methodologies.
- Exposure to hardware acceleration platforms such as Palladium or Protium.
- Experience with revision control systems (e.g., SOS, SVN).
- Ingénieur(e) systèmes et vérification en signaux mixtes II
Compensation
- Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.
- Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
Benefits
- Collaborate cross‑functionally with design, systems, and IP teams to understand constraints and ensure verification coverage.
- Our teams work on the world's most advanced designs, enabling breakthroughs from high‑performance computing to artificial intelligence and machine learning.
- bonus, equity, and benefits.
- Our benefits programs include:
- Cadence also offers employee and dependent Life insurance, and short-term and long-term disability.
- In addition, Cadence provides Global Travel Medical coverage, Business Travel Accident Insurance, and a funded Lifestyle Spending Account (LSA).
Company info
- Be part of a hands‑on development team that promotes engineering excellence, creativity, and innovation.
- At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
- At Cadence, we hire and develop leaders and innovators who want to make a meaningful impact on the future of technology.
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This listing is sourced directly from Cadence's careers page and normalized into a canonical job model.