Altera
BootROM & Firmware Developer
San Jose, California, United States · Senior
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odds of building a lasting career here
Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.
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Personalize to your clock →H-1B wage level
the lottery is wage-weighted — each level is one more entry
The bottom of this range ($149,100) is below the Level I prevailing wage of $152,797. An H-1B cannot be filed below the prevailing wage, so an offer at the floor of this band could not be sponsored as posted.
Based on the DOL prevailing wage for this occupation and worksite, a base salary of $187,075 would place this position at wage Level II. That figure is within the posted range, and I'd like to target it. This role classifies under "Software Developers" for prevailing-wage purposes.
DOL prevailing wage, 2026-27 wage year · Software Developers (15-1252) · San Jose-Sunnyvale-Santa Clara, CA. Wage level is derived by USCIS from the offered wage, occupation and worksite; the occupation shown is inferred from the job title.
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Files H-1B transfers
Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.
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About the role
- Join us in our journey to becoming the #1 FPGA provider in the world as we redefine the next era of programmable innovations!
- The US BootROM & Firmware Organization is looking for fresh faces to join our dynamic, versatile, supportive, fun, and rewarding team to solve the most challenging system and firmware problems, and to grow with us together.
Responsibilities
- Review the product and hardware specifications, and write the firmware design specifications.
- Use C and C++ to implement the configuration and security features of the FPGA devices.
- Use the Emulator and/or FPGA Silicon to validate the user flows.
- Collaborate with hardware and validation engineers on co-engineering and joint debug of complex system level issues.
Requirements
- BS degree or MS degree in Computer Science, Computer Engineering, Engineering Science, Electrical Engineering or equivalent and:
- 5+ years C/C++ programming experience.
- Applicants must be eligible for any required U.S. export authorizations.
Nice to have
- Strong proficiency in C/C++, assembly, and debugging tools.
- Strong system-level debug skills.
- Good understanding and extensive experience with RTOS, device driver development.
- Good understanding of CPU architecture.
- Good understanding of production security and crypto.
- Experience on functional safety and FuSA compliance.
- Shift 1 (United States of America)
- San Jose, California, United States
Skills
- Altera is one of the world's leading providers of programmable solutions.
- It will includes the configuration feature aspect of the FPGA and also security feature aspect of the device.
- Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc.
Compensation
- The pay range below is for Bay Area California only.
- Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc.
- We also offer incentive opportunities that reward employees based on individual and company performance.
Company info
- We also offer incentive opportunities that reward employees based on individual and company performance.
This listing is sourced directly from Altera's careers page and normalized into a canonical job model.