Ambarella Corp.
Sr. ASIC Design Engineer
US Headquarters · Senior · Full-time
Sponsorship not specified$135k-$170kDetected 32 days ago
PythonNLPLLMsAgentic AIVerilogRoboticsCommunicationProblem Solving
About the role
- AI Vision Processors For Edge Applications Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.
- Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
- The successful candidate will have the opportunity to convert to a full-time regular position.
Responsibilities
- Synthesize and optimize RTL for timing, area, and power.
- Developing unit level test environments and tests cases
- Developing front-end methodologies and tool flows.
Requirements
- Master's degree in electrical/Electronics/Computer Engineering with 0-5 years of experience.
- Knowledge of System Verilog, Verilog, python, and Perl.
- Ability to program in scripting languages and the ability to write assembly language programs.
- Logic design, implementation, and verification using Verilog, System Verilog, and any required programing and scripting languages.
Nice to have
- Knowledge of logic synthesis and timing closer is a plus
Compensation
- Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
Benefits
- AI Vision Processors For Edge Applications
- Analyzing and reviewing code coverage and functional coverage and providing recommendations to the verification team to address any gaps.
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This listing is sourced directly from Ambarella Corp.'s careers page and normalized into a canonical job model.