Astera Labs Inc.

Senior Lab Validation Engineer

San Jose, California, United States · Senior

Sponsorship not specifiedDetected 4 days ago

PythonC++Machine LearningNLPElectrical EngineeringCommunicationProblem Solving

About the role

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
You will: - Directly root-cause failures to the circuit, package, firmware, or protocol-level interactions.
Collaborating in the development of evaluation hardware (boards and sockets, including FA friendly sockets) and scripts.

Directly root-cause failures to the circuit, package, firmware, or protocol-level interactions. Collaborate with design, validation, and system engineering teams as needed.
Develop and run stress tests and margining experiments to identify weak design or process corners.
Drive physical failure analysis to isolate and image defects using methods such as fault isolation, probing, de-processing, FIB, thermal/voltage stress testing.
Document debug findings, propose design/process/test improvements, and contribute to FA methodologies.

Minimum of 5 years relevant experience of which 5 years' is hands-on mixed high-speed lab experience working with equipment such as protocol analyzers, BERT, real-time scopes, sampling scopes, TDR, and VNA.
Experience in post-silicon validation and bring-up of high-speed PHYs or retimers.
Solid problem-solving and analytical skills with ability to narrow down complex multi-layer failures.
Experience with optics.
Experience with chip-level security and RAS features.

Minimum of a Bachelor's in Electrical Engineering while a Master's degree is preferred.
Preferred experience (ideal candidate has some of this, but OJT is also possible):

ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
Discover more at www.asteralabs.com.

This listing is sourced directly from Astera Labs Inc.'s careers page and normalized into a canonical job model.