Astera Labs Inc.

Astera Labs Inc.

Senior/Staff Electronics Engineer - Board Validation

San Jose, California, United States · Staff+

Sponsorship not specified$133k-$185kDetected 11 days ago
PythonProduct ManagementEMI/EMCElectrical EngineeringWriting

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odds of building a lasting career here

59Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role100
Entry-level history0
PERM / green-card track0
Lottery odds (Level III)83
Fits your clock70

Sponsors, but it's cap-subject — you still face the weighted lottery (~45% per draw at Level III). Good if you win; have a cap-exempt backup on your list.

Lottery odds assume a STEM candidate.

Personalize to your clock →

H-1B wage level

the lottery is wage-weighted — each level is one more entry

Level I · 1×
Level I$124,4051 entry
Level II$155,8962 entries
Level III$187,4083 entries
Level IV$218,8994 entries

$22,696 more$155,896 — moves this role to Level II and 2 lottery entries. That figure is inside the range the employer already advertised.

Based on the DOL prevailing wage for this occupation and worksite, a base salary of $155,896 would place this position at wage Level II. That figure is within the posted range, and I'd like to target it. This role classifies under "Electronics Engineers, Except Computer" for prevailing-wage purposes.

DOL prevailing wage, 2026-27 wage year · Electronics Engineers, Except Computer (17-2072) · San Jose-Sunnyvale-Santa Clara, CA. Wage level is derived by USCIS from the offered wage, occupation and worksite; the occupation shown is inferred from the job title.

Employer immigration record

from this employer's Department of Labor filings

Files H-1B transfers

28 transfer filings in the last year, covering 28 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.

Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.

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About the role

  • Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
  • Note: This role is not post-silicon electrical validation; it is electrical validation of PCBAs and related hardware products.
  • Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

Responsibilities

  • Support the Hardware Electrical Design teams with de-risking circuits and modules from project kick-off to gerber out.
  • Develop comprehensive hardware electrical validation plans using correct test methods and processes.
  • Bring up the PCBAs upon arrival in the lab, and execute the electrical validation plans to validate all circuits on the board.
  • Pre-empt and de-risk system validation architectures - collaborate with the System Validation teams.
  • Support hardware activities in auxiliary teams - Post-Silicon Electrical Validation, Product Apps, System Validation, FAEs, etc.
  • Support the new designs using knowledge of existing products to de-risk new features and requirements.
  • Specify test equipment, develop test fixtures, help improve hardware lab functions.
  • Expert understanding of design and test for power regulators, PDNs, Bode, clock generators
  • Support hardware activities in auxiliary teams

Requirements

  • Bachelor degree in EE with 3+ years of experience in hardware test or design
  • Demonstrated knowledge of the full hardware product lifecycle from Project Kick-off to RTM

Nice to have

  • Preferred Skills

Compensation

  • The base salary range is $160,000 USD - $200,000 USD.

This listing is sourced directly from Astera Labs Inc.'s careers page and normalized into a canonical job model.