Altera
FPGA Compiler (Placer) Engineer
Toronto, Ontario, Canada · Senior
Stay score
odds of building a lasting career here
Sponsors, but it's cap-subject — you still face the weighted lottery (~45% per draw at Level III). Good if you win; have a cap-exempt backup on your list.
Lottery odds assume a STEM candidate.
Personalize to your clock →Employer immigration record
from this employer's Department of Labor filings
Green-card intent detected
Files H-1B transfers
Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.
Community outcomes
No reports yet — be the first to help the next applicant.
About the role
- At Altera™, our independence as the world's largest pure ‑ play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise.
- Altera is seeking a FPGA Compiler Engineer (Placer) to join our Compiler team in Toronto, Ontario Canada.
Responsibilities
- Design, implement, and enhance FPGA placement algorithms to optimize timing, congestion, and resource utilization.
- Improve runtime performance, scalability, and quality of results (QoR) for large and complex customer designs.
- Develop and refine timing-aware placement strategies to support high-frequency, performance-critical designs.
- Partner with architecture, routing, and STA teams to align placement strategies with FPGA device capabilities and constraints.
- drive improvements to convergence and design closure.
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- 6+ years of experience in FPGA/ASIC CAD, EDA tools, or related fields.
- Experience in algorithms and data structures (optimization, graph theory, heuristics)
- Experience with placement algorithms or physical design flows
- Experience in C/C++ and software engineering best practices
- Experience with placement techniques (analytical placement, simulated annealing, partitioning, clustering)
- Experience with Timing-driven and congestion-driven optimization
- Experience in solving complex, large-scale optimization problems with high performance and scalability requirements.
- We use artificial intelligence to screen, assess, or select applicants for the position. This posting is for an existing vacancy. Canadian work experience is not required for this role.
- Applicants must be eligible for any required Canada export authorizations.
- Experience in ASIC or FPGA physical design methodologies
Nice to have
- Experience with FPGA toolchains (e.g., Quartus, Vivado )
- Knowledge of FPGA architectures and interconnect fabrics
- Familiarity with routing and timing closure techniques
- Experience with parallel or distributed algorithms for EDA tools
- Scripting experience (e.g., Python, Tcl ) for tooling and automation
- Shift 1 (Canada)
- Toronto, Ontario, Canada
- Posting Statement:
Skills
- About Altera
- Position Overview
- Altera is a leader in FPGA innovation, delivering programmable solutions that power AI, cloud computing, networking, and edge applications.
Compensation
- Our compensation is designed to reflect the Canadian labour market.
This listing is sourced directly from Altera's careers page and normalized into a canonical job model.