Cornelis Networks, Inc.

Cornelis Networks, Inc.

Senior ASIC Design Engineer

Austin, Texas, United States · Senior · Full-time

Sponsorship not specifiedDetected 16 hours ago
PythonData AnalysisVerilogElectrical EngineeringTCP/IPVPNCommunication

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About the role

  • Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale.
  • As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.
  • Deep understanding of Host Ethernet adaptor architectures.

Responsibilities

  • Implement RTL designs using Verilog/System Verilog for high-speed data paths and packet processing logic.
  • Define timing constraints for RTL blocks and work with Physical Design engineers to optimize timing closure.
  • Support post-silicon validation, collaborating with hardware, firmware, and software teams to debug and resolve ASIC issues.
  • Contribute to performance optimization and power-aware design strategies for Host Fabric Interface subsystems.

Requirements

  • B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or related field.
  • 8+ years of post-college experience in digital design with proficiency in Verilog and System Verilog.
  • Proven ability in system-level debug and root cause analysis of technical issues.

Nice to have

  • Knowledge of Ethernet architecture and networking protocols.
  • Prior experience with RTL development for Ethernet host adapters and system debug.
  • 5+ years of experience with scripting languages such as TCL, Python, or Perl.
  • Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services.
  • We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

Compensation

  • We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits.

Benefits

  • Collaborate with verification engineers to create block- and system-level test plans to ensure comprehensive design coverage.

Company info

  • Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world's most demanding computational challenges with our next-generation networking solutions.
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