Nuvacore
CPU Static Timing Analysis (STA)
Austin, TX · Senior
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About the role
- As a CPU Static Timing Analysis (STA) Engineer, you will participate in the following:
- Responsible for verifying the quality of the timing/noise runs and checking analysis coverage.
- Responsible for working with the CAD team and providing feedbacks on tool/flow issues or enhancement requests to improve productivity.
Responsibilities
- Nuvacore is building ground-up high performance, low-power CPU for next-generation compute workloads.
- As physical design engineers as part on the CPU team, you will own CPU units for the full silicon development lifecycle.
- Responsible for working with the design teams on understanding the violations and providing fixing suggestions/strategies as well as constraint refinements when needed.
- Responsible for performing ECO generation per design needs.
- Develop essential methodologies and infrastructure for Timing Analysis & Design closure.
Requirements
- Hold a BS or MS degree with 12+ years of experience (for Lead roles) or 5+ years of experience (for Individual Contributor roles) in static timing analysis on high-speed designs.
- Knowledge in industry-standard EDA tools and scripting languages.
- Possess substantial years of experience in CPU unit-level timing and noise analysis
- Experience in using Agentic AI tools for productivity and automation.
Compensation
- $140k-$250k
This listing is sourced directly from Nuvacore's careers page and normalized into a canonical job model.