Chipagents

Design and Verification Engineer

San Jose

Sponsorship not specifiedDetected 42 days ago

Machine LearningAgentic AICadenceVerilogElectrical EngineeringResearchCollaboration

About the role

We are seeking a highly capable Design and Verification Engineer to join our core product and research team.

Collaborate with AI engineers to model and codify chip design and verification workflows.
Design, implement, and debug RTL designs and SystemVerilog/UVM testbenches used in training and validating AI agents.
Build reusable examples, design patterns, and edge cases to train and evaluate generative and agentic AI models.
Support benchmarking and evaluation of AI-assisted design and verification productivity across realistic chip development tasks.
In this role, you will work side-by-side with our AI engineering and research groups to build cutting-edge agentic AI systems for EDA.
Your deep domain expertise in RTL design and functional verification will shape how AI systems reason about complex hardware workflows-from architecture specification through testbench validation.
You will play a central role in teaching our AI how engineers think and work, ensuring our solutions integrate naturally into real-world design environments.

Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or related field.
Proficiency with Verilog/SystemVerilog, UVM, and simulation tools (e.g., Synopsys VCS, Cadence Xcelium, Siemens Questa).
Experience designing and verifying complex subsystems or SoCs, preferably in production or research tapeouts.
Experience in RTL design, functional verification, and/or architecture-level modeling.
Familiarity with lint, CDC, formal, coverage analysis, and synthesis flows.
Strong collaboration skills and a passion for enabling the next generation of EDA workflows.
Work at the frontier of AI and semiconductor design.
Collaborate with a world-class team spanning AI, systems, and EDA.
Shape a foundational shift in how chips are built.
$150K/yr - $350K/yr + Offers Equity. We are open to discuss above-scale compensation with exceptional candidates on a case-by-case basis.
Unlimited PTO and full benefits (medical, vision, dental, 401k).
Two engineering-centric offices with free parking, private gym, and free lunch, drinks and snacks.

Interest or experience in AI/ML, especially AI-assisted engineering tools, is a major plus.

We are open to discuss above-scale compensation with exceptional candidates on a case-by-case basis.

$150K/yr - $350K/yr + Offers Equity.
Provide deep domain expertise to help AI agents interpret specifications, generate RTL code, and understand verification coverage.

Work closely with customers, product, and research teams to translate engineering pain points into automated AI workflows.
We are open to discuss above-scale compensation with exceptional candidates on a case-by-case basis.

This listing is sourced directly from Chipagents's careers page and normalized into a canonical job model.