Microchip Technology
Engineer II - Digital Design
CO - Colorado Springs - East Cheyenne Mountain Blvd · Mid · Full-time
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odds of building a lasting career here
Sponsors, but it's cap-subject — you still face the weighted lottery (~30% per draw at Level II). Good if you win; have a cap-exempt backup on your list.
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The bottom of this range ($80,000) is below the Level I prevailing wage of $85,134. An H-1B cannot be filed below the prevailing wage, so an offer at the floor of this band could not be sponsored as posted.
DOL prevailing wage, 2026-27 wage year · Electrical Engineers (17-2071) · Colorado Springs, CO. Wage level is derived by USCIS from the offered wage, occupation and worksite; the occupation shown is inferred from the job title.
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About the role
- See your first semiconductor device evolve from an idea to actual silicon as part of a team at Microchip.
- Due to the security nature of the products developed by this team, this is a full time work from office position.
- Participate and contribute to the verification and bring-up of such blocks by writing assertions, debugging code, and interacting with other team members.
Responsibilities
- You will be at the core of the digital logic design effort responsible for creating state-of-the-art cryptographic based hardware security solutions.
- This position requires a strong interest in Digital design development and the flexibility to adapt with evolving requirements.
- Join us, and you'll help design cost-effective, ultra-secure electronic defense mechanisms for security sensitive and automotive markets.
- Implement integrated circuits which include embedded microcontrollers, cryptographic algorithms, supporting hardware functions, firmware, or software.
- Architect and design digital logic blocks or validation suites specified by you or others.
- Support design integration activities like Clock Doming Crossing, Synthesis, and DFT as you resolve timing closure, power, and logical issues.
- Experience in design methodology surrounding integrated circuit creation.
- Project experience in multiple aspects of digital design flow such as RTL design, simulation, logic synthesis, DFT, Timing constraint generation, Static Timing Analysis, Gate level simulation, or Equivalence checking.
- How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization?
- People come to work at Microchip because we help design the technology that runs the world.
Requirements
- Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.
- 2.5 to 5 years of professional experience in an industry-related technical role.
- Experience with hardware description and assertion languages: SystemVerilog, SystemVerilog Assertions (SVA).
Skills
- Unix/Linux shell programming, Perl/Python/Ruby, Makefile, Revision management.
- Handling, Hearing, Other, Reaching, Seeing, Talking, Works Alone, Works Around Others
- Travel Time:
- Physical Attributes:
- Scripting and automation skills: Unix/Linux shell programming, Perl/Python/Ruby, Makefile, Revision management.
Compensation
- We offer a total compensation package that ranks among the best in the industry.
- It consists of competitive base pay, restricted stock units, and quarterly bonus payments.
- The annual base salary range for this position, which could be performed in the US, is $80,000 - $90,000.* *Range is dependent on numerous factors including job location, skills and experience.
- Want to join a 17,000-member team that works on the technology that powers the world around us?
Benefits
- Benefits of working at Microchip
Company info
- Are you looking for a unique opportunity to be a part of something great?
- We offer all that and more at Microchip Technology Inc.
- We are looking for an experienced Digital Design Engineer to work with our team in the Secure Computing Group at Microchip.
Equal opportunity
- Microchip Technology Inc is an equal opportunity/affirmative action employer.
- equal opportunity/affirmative action employer.
This listing is sourced directly from Microchip Technology's careers page and normalized into a canonical job model.