Cerebras Systems
Network Systems Architect
Sunnyvale, CA
Sponsorship not specifiedDetected 33 days ago
ComplianceFPGAElectrical EngineeringBGP/OSPFCommunication
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odds of building a lasting career here
40Risky
Cap-exempt (no lottery)0
Sponsors this role90
Entry-level history0
PERM / green-card track0
Lottery odds40
Fits your clock70
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About the role
- As a Network Systems Architect, you will define the scale out, and particularly scale-up network architecture for current and future Cerebras platforms, including proprietary accelerator interconnects, protocols, and switching.
- Your primary focus is low-latency scale-up and system fabrics, with enough breadth across scale-out and customer-facing networks to define clean boundaries.
- Hands-on here means that architectural judgment is grounded in prior low-level implementation, modeling, bring-up, or debugging.
Responsibilities
- Write architecture and interface specifications, lead design reviews, and drive cross-layer decisions through implementation, bring-up, and qualification.
Requirements
- BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- Typically 12 or more years of relevant industry experience, including principal-level technical ownership of a major networking, switching, accelerator, or HPC system from architecture into implementation or deployment.
- Experience deriving network requirements from incomplete workload and system information, with the range to make decisions across software, accelerator I/O, topology, and physical constraints.
- Work with application, compiler, runtime, and communication-library teams to understand mapping and communication choices, then derive the required bandwidth, latency, ordering, availability, and serviceability.
- Deep expertise in low-latency or proprietary interconnects, fabric protocols, switch architecture, or a closely related area, with enough data-plane depth to reason about switch pipelines, buffering, routing, flow or congestion control, and reliability.
- Working knowledge of Ethernet, IP, and RDMA, plus conceptual familiarity with BGP and EVPN and the tradeoffs between routed networks and simpler low-latency scale-up designs.
- Architectural judgment grounded in prior implementation, modeling, silicon, lab, bring-up, or debugging work.
- A record of making clear technical decisions and influencing engineering leaders, implementation teams, suppliers, and customers.
- Relevant experience may include one or more of the following.
- Proprietary accelerator interconnects or scale-up technologies such as NVLink, xGMI, TPU ICI, Xe Link, or UALink-class systems.
- Switch ASIC, NIC or DPU, accelerator I/O, transport offload, collective acceleration, coherent memory, or custom-fabric work.
- FPGA architecture or mapping experience, or work with other placement-sensitive systems where topology materially affects communication.
- AI or HPC communication stacks such as NCCL, RCCL, MPI, SHMEM, or proprietary collective libraries.
- RoCE, InfiniBand, PCIe, CXL, or other relevant scale-out and I/O technologies.
Nice to have
- Preferred Experience
Skills
- Cerebras works with the leading model labs, global enterprises, and cutting-edge AI-native startups.
Company info
- Build a breakthrough AI platform beyond the constraints of the GPU.
- Publish and open source their cutting-edge AI research.
- Work on one of the fastest AI supercomputers in the world.
- Enjoy job stability with startup vitality.
- Our simple, non-corporate work culture that respects individual beliefs.
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This listing is sourced directly from Cerebras Systems's careers page and normalized into a canonical job model.