Sifive
Software Engineer - FPGA-Accelerated RTL Simulation
Berkeley, California, United States · Senior · Contract
Stay score
odds of building a lasting career here
Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.
Lottery odds assume a STEM candidate.
Personalize to your clock →H-1B wage level
the lottery is wage-weighted — each level is one more entry
$14,301 more — $193,149 — moves this role to Level III and 3 lottery entries. That figure is inside the range the employer already advertised.
Based on the DOL prevailing wage for this occupation and worksite, a base salary of $193,149 would place this position at wage Level III. That figure is within the posted range, and I'd like to target it. This role classifies under "Software Developers" for prevailing-wage purposes.
DOL prevailing wage, 2026-27 wage year · Software Developers (15-1252) · San Francisco-Oakland-Fremont, CA. Wage level is derived by USCIS from the offered wage, occupation and worksite; the occupation shown is inferred from the job title.
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About the role
- You will be responsible for the C++ application that constitutes the software-component of our custom hardware emulation framework (originally based on FireSim, https://fires.im ).
- FPGA RTL Designers: Components of our FPGA-hosted emulators are written in Chisel and optimized for Xilinx FPGAs.
- Compiler Developers: We compile ASIC RTL down to deterministic, FPGA-friendly emulation RTL using a purpose-built compiler based on MLIR & CIRCT.
Responsibilities
- Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions.
- You will help build the next generation of hardware emulation capacity for our RISC-V core IP-making it fast for software development, productive to debug, and cost-effective for deployment to every engineer in the company.
Requirements
- Strong understanding of C++ concurrency features and demonstrated experience building multithreaded applications.
Nice to have
- Familiarity with compiler development (ideally LLVM or MLIR) or FPGA RTL design is highly desired, but not required.
Compensation
- $178,848.00-$218,592.00
- In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity.
Benefits
- In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!
Company info
- At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.
Equal opportunity
- SiFive is an equal opportunity employer.
Visa & Work Authorization
- ntingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any ne
This listing is sourced directly from Sifive's careers page and normalized into a canonical job model.