Altera

Altera

ATE Solution Test Engineer

San Jose, California, United States

Sponsorship not specified$119k-$172kDetected 2 days ago
PythonC++GitData AnalysisProduct ManagementFPGAElectrical EngineeringControls

About the role

  • The ATE Solution Test Engineer is responsible for delivering best in class ATE test solutions that are scalable, high quality, and aligned to product needs.
  • Our mission is to standardize and simplify methodologies and flows, enabling predictable, fast, and consistent Test Program (TP) releases.

Responsibilities

  • Develop, validate, and maintain ATE test methods and production test programs for wafer sort and final test using Teradyne and/or Advantest platforms.
  • Own product test development through the complete product lifecycle-from NPI, silicon bring-up, characterization, qualification, and production ramp to sustaining engineering.
  • Analyze silicon performance across process, voltage, and temperature (PVT) corners to establish production limits and optimize guardbands.
  • Drive yield improvement, test time reduction, and defect escape prevention through data-driven analysis and test optimization.
  • Perform silicon, tester, hardware, and manufacturing debug to resolve complex product issues.
  • Collaborate with cross-functional teams including Design, DFT, Validation, Reliability, Package Engineering, Manufacturing, and OSAT partners to ensure successful product execution.
  • Support production releases, manufacturing transfers, and high-volume manufacturing while driving continuous improvements in quality and cost of test.

Requirements

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related engineering discipline.
  • 5+ years of experience with semiconductor test methodologies, silicon characterization, and production test development for complex semiconductor devices.
  • 5+ years of experience developing and implementing ATE test methods for semiconductor products from characterization through high-volume manufacturing.
  • 5+ years of experience working with Design-for-Test (DFT) architectures, including Scan, MBIST, JTAG, Boundary Scan, and ATPG.
  • 5+ years of experience supporting wafer sort, final test, and semiconductor manufacturing test flows.
  • 5+ years of experience working with production test hardware, including probe cards, load boards, sockets, and related ATE interface hardware.
  • 5+ years of experience analyzing process variation, optimizing test guardbands, and developing production test limits to improve yield and quality.
  • 5+ years of programming or scripting experience using Python, Perl, C++, or similar languages to automate test development, data analysis, or engineering workflows.
  • 5+ years of experience using JMP or equivalent statistical data analysis tools for silicon characterization, yield analysis, and test optimization.
  • 3+ years of experience working in Agile development environments and using version control systems (e.g., Git or equivalent).
  • 5+ years of industry experience developing Automated Test Equipment (ATE) test programs using Teradyne and/or Advantest platforms.

Skills

  • About Altera

Compensation

  • The pay range below is for Bay Area California only.
  • Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc.
  • We also offer incentive opportunities that reward employees based on individual and company performance.
  • $118,900 - $172,000 USD

This listing is sourced directly from Altera's careers page and normalized into a canonical job model.