Altera
Manager, Static Timing Analysis (STA)
Toronto, Ontario, Canada
Sponsorship not specified$145k-$209kDetected 30 days ago
PythonFPGAVerilogElectrical EngineeringLeadershipCollaboration
About the role
- The actual salary offered may vary based on several factors, including the position's location, as well as the candidate's experience, skills, training, and job-specific knowledge.
Responsibilities
- Build, manage, and mentor a high-performing STA team
- drive technical excellence and career development.
- Own end-to-end STA for FPGA designs, including constraint development, timing analysis, and timing signoff.
- Define and implement robust STA methodologies, flows, and best practices to improve timing convergence and design quality.
- Partner with RTL design, synthesis, physical design (P&R), and architecture teams to identify and resolve timing issues.
- Drive improvements in performance, power, and area (PPA) through timing-driven design and optimization techniques.
- Build, manage, and mentor a high-performing STA team; drive technical excellence and career development.
- Our compensation is designed to reflect the Canadian labour market.
- RTL design (Verilog/SystemVerilog)
- Low-power and high-performance design challenges
Requirements
- 10+ years of experience in Static Timing Analysis (STA) for ASIC or FPGA designs.
- 3+ years of experience managing or leading engineering teams.
- Technical Expertise:
- Deep knowledge of STA concepts (setup/hold, clock domain crossing, timing constraints)
- Strong experience with timing signoff tools (e.g., PrimeTime or equivalent)
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
- We use artificial intelligence to screen, assess, or select applicants for the position. This posting is for an existing vacancy. Canadian work experience is not required for this role.
- Applicants must be eligible for any required Canada export authorizations.
Nice to have
- Experience with FPGA architecture and design flows
- Exposure to scripting/automation (e.g., Tcl, Python) for timing analysis
- Experience working in large-scale, distributed engineering environments
- Work on cutting-edge technology in AI, data center, and networking applications
- Shift 1 (Canada)
- Toronto, Ontario, Canada
- Posting Statement:
Skills
- Leverage industry-standard EDA tools to analyze timing, debug violations, and automate flows where applicable.
Compensation
- Our compensation is designed to reflect the Canadian labour market.
- The actual salary offered may vary based on several factors, including the position's location, as well as the candidate's experience, skills, training, and job-specific knowledge.
- In addition to base salary, we offer performance-based incentive opportunities that reward both individual contributions and overall company success.
- Estimated Salary Range: $ 144.6K - $209.3K CAD
This listing is sourced directly from Altera's careers page and normalized into a canonical job model.