Astera Labs Inc.

Astera Labs Inc.

Senior Director System Validation Engineer

San Jose, CA · Director

Sponsorship not specifiedDetected 4 days ago
LinuxMachine LearningLoad TestingCommunication

About the role

  • Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
  • This role offers a unique opportunity to shape validation strategy for cutting-edge connectivity silicon and gain deep insight into next-generation AI infrastructure platforms.

Responsibilities

  • Excellent communication skills and ability to influence executives and cross‑functional partners.

Requirements

  • ≥5 years hands-on experience with Silicon/System bring-up, validation, and debug, including in customer systems.
  • Expertise in validation methodologies: pre‑silicon simulation/emulation, post‑silicon bring‑up, system validation, stress testing, and performance characterization.
  • ≥8 years leading validation teams planning, execution and maintaining project visibility.
  • ≥10 years hands-on experience with Silicon/System bring-up, validation, and debug, including in customer systems.
  • Thorough knowledge of high-speed protocols like PCIe, CXL, NVMe, or Ethernet.
  • The ideal candidate brings deep expertise in silicon/system validation, a strong architectural mindset, and a proven ability to scale organizations in fast‑moving, high‑performance computing environments.

Nice to have

  • Strong academic background in Electrical or Computer Engineering.
  • Bachelor's required, Master's preferred.
  • Preferred Experience

Skills

  • ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
  • Discover more at www.asteralabs.com.
  • Connectivity is a critical component of every AI accelerator deployment and hyperscale data center architecture.

Compensation

  • The base salary range is $240,000 USD - $300,000 USD.
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