Astera Labs Inc.
Principal Package Architect
San Jose, California, United States · Principal
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About the role
- This is a senior individual contributor role focused on setting technical direction and driving packaging technology development for NPO and CPO products.
Responsibilities
- Lead R&D for advanced packaging of optical chips, including 2.1D, 2.5D, and 3D integration.
- Define and optimize wafer-level, panel-level, or die-level packaging process flows.
- Drive EIC-to-PIC integration and broader optical device integration efforts.
- Partner with OSAT, tool vendors, and material suppliers to drive equipment, process, and materials development.
- Develop and maintain packaging PDKs and design rules for NPO and CPO products.
Requirements
- 8+ years of experience in semiconductor or advanced packaging engineering, with demonstrated technical leadership.
- Experience with silicon photonics chip packaging and EIC/PIC integration.
- Hands-on experience with advanced packaging materials, including underfill, molding compounds, dielectrics, adhesives, or optical-grade encapsulants.
- Proven track record of equipment and process qualification with OSAT or tool suppliers.
- Experience with PDK development and packaging design rule authoring.
Nice to have
- Hands-on experience with CPO or NPO product development. <spa
Skills
- Labs (NASDAQ:
- ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
- Discover more at www.asteralabs.com.
- Principal Package Architect
- San Jose, CA (On-site).
This listing is sourced directly from Astera Labs Inc.'s careers page and normalized into a canonical job model.