Micron
Principal Design Engineer
San Jose, CA · Principal · Full-time
Sponsorship not specified$181k-$361kDetected 13 days ago
Machine LearningLLMsAgentic AIElectrical EngineeringLeadershipCommunicationMentoring
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odds of building a lasting career here
64Sponsors, lottery-bound
Cap-exempt (no lottery)0
Sponsors this role100
Entry-level history0
PERM / green-card track0
Lottery odds (Level IV)94
Fits your clock70
Sponsors, but it's cap-subject — you still face the weighted lottery (~61% per draw at Level IV). Good if you win; have a cap-exempt backup on your list.
Lottery odds assume a STEM candidate.
Personalize to your clock →Employer immigration record
from this employer's Department of Labor filings
Green-card filing pattern in this occupation
Context, not a finding about this posting: of this employer's 143 green-card filings in this occupation, 99% were for a worker who already held the job.
Green-card follow-through: 87%
Of 138 labor certifications old enough to have been used, 18 expired without the employer filing the next step. Median time from filing to decision: 496 days.99% of their filings were for a worker who already held the job.Only certifications past the 180-day window are counted — recent ones cannot have expired yet.
Files H-1B transfers
37 transfer filings in the last year, covering 37 workers. Median labor-condition decision: 7 days. An employer that already files transfers is one that can take over an existing H-1B.
Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.
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About the role
- Our vision is to transform how the world uses information to enrich life for all.
- Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
- Incorporate AI into your work and adjust workflows.
Responsibilities
- IO architecture & ownership: Define, design and verify major IO blocks(output driver, pre-driver, serializer, slew-rate control, equalizers, input receiver, Vref generator, deserializer, clock distribution, multi-phase clock generation, DCC/QEC, calibration & training circuits) to meet ONFI/JEDEC timing and electrical specs
- Timing & signal integrity: Lead the IO timing budget (tDIVW, tDVW, setup/hold, jitter, duty-cycle distortion).
- Work with SI/PI engineers on channel, package and power-delivery effects (ISI, crosstalk, SSO noise, VCCQ ripple) and follow through between channel simulation and circuit design.
- Power, area & physical design: Optimize IO power (ICCQ, energy per bit) and area. Drive floorplan, pad-ring and bump planning, clock routing and shielding with layout, and correlate post-layout results.
- Robustness & reliability: Design for PVT, mismatch (Monte Carlo/high-sigma), aging (NBTI/HCI), ESD/latch-up and multi-die loading, with trims and margins that hold across the product lifetime.
- Silicon validation & debug: Plan characterization with product and test engineering, lead failure analysis of IO timing and electrical fails, and feed lessons back into the next design.
- Build efficiency by using AI daily. Incorporate AI into your work and adjust workflows. Summarize data from PVT, Monte Carlo, and post-layout SIM. Compose and maintain block-level and sub-system documentation to improve design efficiency continuously.
- Build agents, prompt libraries and scripts for recurring IO tasks, and restructure simulation setups and review checklists so AI can work on them.
- Technical leadership & mentorship: Present to design reviews and expert panels, and mentor engineers on IO fundamentals and AI-first ways of working.
- The Non-Volatile Engineering Group (NVEG) at Micron develops memory products that are best-in-class in die size, performance, reliability, and power!
Requirements
- Experience closing IO timing and electrical specs across PVT, mismatch and aging, including impedance calibration and termination.
Nice to have
- Experience with ONFI/Toggle NAND interfaces or DRAM interfaces (DDR4/5, LPDDR5/6, HBM3/3E/4).
- Low-power IO techniques: low-swing signaling, power gating, and fast wake-up.
- Sophisticated CMOS device physics, reliability mechanisms and BSIM modeling as they apply to high-speed IO.
- $181,000.00 - $361,000.00 a year
- The pay scale is subject to change depending on business needs.
- Micron is proud to be an equal opportunity workplace and is an affirmative action employer.
- To learn about your right to work click here.
- To learn more about Micron, please visit micron.com/careers
Compensation
- The US base salary range that Micron Technology estimates it could pay for this full-time position is:
Benefits
- Additional compensation may include benefits, bonuses and equity.
- Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.
- As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth.
- Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.
- Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
- Additionally, Micron benefits include a robust paid time-off program and paid holidays.
- For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.
- Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training.
Company info
- We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
- Specs & customers: Work with Applications Engineering and system teams to evaluate new interface specs and customer requests, and quantify feasibility and design trade-offs.
- Our mission is to innovate and deliver groundbreaking non-volatile memory solutions such as NAND.
- As the pace of technology accelerates, NVEG is aggressively embedding AI across every stage of the design flow - from circuit exploration and layout optimization to silicon debug and specification analysis - and we are looking for engineers who not only use AI in their daily work but also actively reshape our engineering workflows to unlock AI's full potential!
Equal opportunity
- equal opportunity workplace and is an affirmative action employer.
Visa & Work Authorization
- ve consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protec
This listing is sourced directly from Micron's careers page and normalized into a canonical job model.