Eliyan Corporation

Eliyan Corporation

DV - Staff Verification Engineer - Serdes

Bay Area, Vancouver or Toronto · Staff+

Sponsorship not specifiedDetected 198 days ago
VerilogSignal ProcessingLeadership

Stay score

odds of building a lasting career here

37Risky
Cap-exempt (no lottery)0
Sponsors this role80
Entry-level history0
PERM / green-card track0
Lottery odds40
Fits your clock70

Thin sponsorship signal and lottery-bound. A low-probability bet with your clock running. Prioritize cap-exempt roles and proven entry-level sponsors first.

Lottery odds assume a STEM candidate.

Personalize to your clock →

Employer immigration record

from this employer's Department of Labor filings

Files H-1B transfers

3 transfer filings in the last year, covering 3 workers. Median labor-condition decision: 10 days. An employer that already files transfers is one that can take over an existing H-1B.

Sourced from Department of Labor LCA, PERM and prevailing-wage disclosure data. Employer matching is by name, so figures may be split across an employer's legal entities. Absence of a filing means none appears in our copy of the data, not that none exists.

Community outcomes

No reports yet — be the first to help the next applicant.

About the role

  • This is a hands-on technical leadership role.
  • You will work with a cross-functional team of experts.

Responsibilities

  • Develop and execute verification plans for Serdes, other PHYs, DSP blocks, TX/RX equalization and CDR.
  • Create and maintain SystemVerilog/UVM-based verification environments
  • Maintain regression environments
  • Collaborate with design team to ensure design quality
  • Develop, maintain, and track various test plan items and progress towards RTL freeze

Skills

  • Join the leading chiplet startup!

This listing is sourced directly from Eliyan Corporation's careers page and normalized into a canonical job model.