Intel
Analog Mixed Signal Design Engineer
Virtual Canada, CA · Internship
Sponsorship not specified$130k-$183kDetected 15 days ago
PythonCadenceVerilogElectrical EngineeringCommunicationCollaborationProblem Solving
About the role
- This position offers significant opportunities to enhance verification methodologies and contribute to behavioral modeling initiatives that accelerate silicon success.
Responsibilities
- Static Timing Analysis & Design Closure
- Lead static timing analysis (STA) execution for mixed-signal designs, ensuring robust timing closure across analog-digital interfaces
- Drive timing optimization and constraint development for complex mixed-signal systems
- Analog Circuit Design & Verification
- Execute analog circuit design tasks including simulation setup, testbench development, and schematic optimization using Cadence ADE
- Perform comprehensive mixed-signal verification encompassing analog simulations, behavioral modeling, and timing analysis
- Root-cause analysis of pre-silicon design challenges with systematic corrective action implementation
- Collaborate across disciplines with analog designers, digital architects, RTL teams, and physical design engineers
- Develop behavioral models to improve simulation accuracy and efficiency
- Advance verification flows and methodologies supporting evolving mixed-signal design requirements
Requirements
- Bachelor's degree in Electrical or Computer Engineering or in a STEM related field with 2+ years of industry experience
- 2+ years of experience with mixed signal verification and driving methodology changes and initiatives.
- 2+ years of experience in scripting languages such as Python for automation purposes.
- The Minimum qualifications are required to be initially considered for this position.
- SPECIAL NOTE - Intel is in the process of securing office space in the greater metropolitan area of Toronto, Ontario.
- This office will serve as your assigned work location in the future.
- Once the site is operational, your position will follow Intel's hybrid work model, which currently requires on-site presence at least four days per week.
- Until the office is ready, you will be classified as a remote employee and will be working virtually from the greater metropolitan area of Toronto, Ontario.
Nice to have
- Post Graduate degree in Electrical or Computer Engineering or in a STEM related field.
- Experience working within mixed signal systems like SerDes or PLLs.
- Experience with static timing analysis and analog circuit designs.
- Experience with Cadence ADE for running simulations and debugging testbenches.
- Experience with script development and automation using AI.
- Experience with mixed-signal design principles, including interfaces between analog and digital domains.
- Strong analytical and problem-solving skills, alongside effective team collaboration capabilities.
- Experience with analog behavioral modeling (Verilog-A, SystemVerilog, etc.) is a plus
Skills
- The Role and Impact
Compensation
- CAD 129,740.00-183,170.00 Salary range dependent on a number of factors including location and experience.
Equal opportunity
- Intel is committed to a culture of accessibility.
- Intel provides accommodations to applicants and employees with disabilities.
- Find information and request accommodation here.
- Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices.
This listing is sourced directly from Intel's careers page and normalized into a canonical job model.